VIA Technologies VB7009 User Manual page 10

VIA VB7009 User Manual
Lists of Figures
Figure 1: Layout diagram of the VIA VB7009 board (top side) ..................................................................................4
Figure 2: Mounting holes and dimensions of the VIA VB7009 ...................................................................................5
Figure 3: External I/O port dimensions of the VIA VB7009 .........................................................................................5
Figure 4: Height distribution of the VIA VB7009 (for fan model) ..............................................................................6
Figure 5: Back panel I/O ports ............................................................................................................................................7
Figure 6: PS/2 ports diagram ...............................................................................................................................................7
Figure 7: VGA port diagram ................................................................................................................................................8
Figure 8: COM port diagram ...............................................................................................................................................8
Figure 9: Parallel port diagram ...........................................................................................................................................9
Figure 10: Gigabit Ethernet port diagram ..................................................................................................................... 10
Figure 11: USB 2.0 port diagram ..................................................................................................................................... 11
Figure 12: Audio jack receptacle stack diagram .......................................................................................................... 11
Figure 13: ATX power connector diagram ................................................................................................................... 12
Figure 14: CMOS battery slot diagram .......................................................................................................................... 13
Figure 15: Front panel pin header diagram .................................................................................................................. 14
Figure 16: Front audio pin header diagram .................................................................................................................. 15
Figure 17: SMBus pin header diagram ........................................................................................................................... 16
Figure 18: CPU and System fan connectors diagram .................................................................................................. 17
Figure 19: SATA connectors diagram ............................................................................................................................ 18
Figure 20: USB 2.0 pin header diagram ......................................................................................................................... 19
Figure 21: COM pin headers diagram ............................................................................................................................ 20
Figure 22: PS/2 keyboard and mouse pin header diagram ....................................................................................... 21
Figure 23: LVDS panel connector diagram ................................................................................................................... 22
Figure 24: LVDS inverter connector diagram ............................................................................................................... 24
Figure 25: S/PDIF connector diagram ............................................................................................................................. 25
Figure 26: SPI pin header diagram .................................................................................................................................. 26
Figure 27: LPC pin header diagram................................................................................................................................. 27
Figure 28: Digital I/O pin header diagram .................................................................................................................... 28
Figure 29: Temperature sensor pin header diagram ................................................................................................... 29
Figure 30: Jumper settings example ............................................................................................................................... 30
Figure 31: Clear CMOS jumper diagram ....................................................................................................................... 31
Figure 32: COM2 voltage jumper diagram ................................................................................................................... 32
Figure 33: COM3 and COM4 voltage jumper diagram.............................................................................................. 33
Figure 34: COM5 and COM6 voltage jumper diagram.............................................................................................. 34
Figure 35: SATA DOM power jumper diagram ........................................................................................................... 35
Figure 36: LVDS panel power jumper diagram ........................................................................................................... 36
Figure 37: LVDS inverter power jumper diagram ........................................................................................................ 37
Figure 38: DDR3 memory slot diagram ......................................................................................................................... 38
Figure 39: Unlocking the memory DIMM slot .............................................................................................................. 39
Figure 40: Inserting the memory module ...................................................................................................................... 39
Figure 41: Locking the memory module ....................................................................................................................... 39
Figure 42: Removing the memory module ................................................................................................................... 40
Figure 43: PCI slot diagram .............................................................................................................................................. 41
Figure 44: Suggested minimum chassis dimensions ................................................................................................... 42
Figure 45: Suggested minimum internal chassis ceiling height ................................................................................ 43
Figure 46: Suggested keepout areas .............................................................................................................................. 43
Figure 47: Illustration of the Main menu screen (for VB7009-16/VB7009-10E SKU) .......................................... 45
Figure 48: Illustration of the Standard CMOS Features screen ................................................................................ 47
Figure 49: Illustration of the IDE Channel 0 Master screen ...................................................................................... 48
Figure 50: Illustration of the IDE Channel 0 Slave screen ......................................................................................... 48
Figure 51: Illustration of the Advanced BIOS Features screen ................................................................................ 50
Figure 52: Illustration of the CPU Feature screen ....................................................................................................... 52
Figure 53: Illustration of the Hard Disk Boot Priority screen .................................................................................... 53
Figure 54: Illustration of the Advanced Chipset Features screen ............................................................................ 54
Figure 55: Illustration of the PCIE Bus Control screen ............................................................................................... 55
Figure 56: Illustration of the UMA & P2P Bridge Control screen ............................................................................ 56
Figure 57: Illustration of the CPU & PCI Bus Control screen .................................................................................... 57
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