Freescale Semiconductor NXP CodeWarrior USB TAP User Manual page 23

Table A.1 CodeWarrior USB TAP for JTAG/COP Signal Directions ( continued )
JTAG/
COP
Pin
13
14
15
16
1
100KOhm pull-up to buffered TGT PWR.
2
4.7KOhm pull-up to buffered TGT PWR.
Table A.2 CodeWarrior USB TAP for JTAG/COP Signal Recommendations/Requirements
JTAG/
COP
Pin
1
2
3
USB TAP Users Guide
Signal Signal
Mnemonic Direction
HRST Bi-directional
No Connect - n/a -
CKSO From target
GND - n/a -
Signal Requirement
Mnemonic
TDO Must be wired to the target processor. TDO is an output from
the target processor and an input to the USB TAP emulator.
The TDO trace run should be kept short and maintain a "two-
signal-width" spacing from any other parallel dynamic signal
trace. TDO should have a series termination resistor located
near the target processor.
QACK May be wired to the target processor. QACK is an input to
most PowerPC processors and must remain low while the
USB TAP emulator is connected to the target. The USB TAP
emulator connects this signal internally to the JTAG/COP
GND pin (16) through a 100Ohm resistor.
TDI Must be wired to the target processor. The USB TAP
emulator drives the TDI output with up to 50mA. The TDI
trace should be kept short and maintain a "two-signal-width"
spacing from any other parallel dynamic signal trace. TDI
should have an RC termination option at the processor.
JTAG/COP Connector Information
Description
Open-drain. 100Ohm to ground when
asserted by USB TAP, 35pF load when
2
not asserted
2
30pF load
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