Clock Sources; Clock Control; Figure 10. Navigating In The Demonstration Menus - STMicroelectronics STM32100B-EVAL User Manual

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Figure 10. Navigating in the demonstration menus

2.5

Clock sources

2.5.1

Clock control

The STM32F100VB's internal clocks are derived from the HSE clocked by the external
8 MHz crystal.
In this demonstration application, the different system clocks are configured as follows:
●
The system clock is set to 24 MHz. The PLL is used as the system clock source:
24 MHz.
●
The HCLK frequency is set to 24 MHz
●
The timer clock (TIMCLK) is set to 24 MHz
●
The PCLK1 is set to 24 MHz
●
The PCLK2 is set to 24 MHz
Only the RTC is clocked by a 32 kHz external oscillator.
Figure 11 illustrates the clock tree organization for this demonstration.
Doc ID 16982 Rev 1
Running the demonstration
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