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eZ80AcclaimPlus! Development Kit
User Manual
16
If the Board is powered via a wall outlet and P3 is not used, communication with the PC
can be established through a DB9 female connector (P4) which is connected to the
UART1 block of the eZ80F91 MCU.
All signals that control access to on-board memory are routed to the Board's test points;
please refer to
Jumper Settings
All available GPIO ports that exist on the eZ80F91 MCU are routed to connector J10,
which is a standard 0.1"-pitch header. These signals are only routed to the odd-numbered
pins; all even-numbered pins are connected to GND. Please refer to
matic Diagrams
ers are described in Table 1.
Jumper
Name
Description
J11
Flash WP
J12
Power Source
J26
RTC_V
J25
RXD0
J24
RXD1
J23
CTS1
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The Zilog Developer Studio II Integrated Development Environment (ZDS II IDE) is a
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Designed to run on the Windows Vista, Windows 7 and Windows XP Professional operat-
Appendix A
Appendix B. Schematic Diagrams
on page 18 for the exact signal connections to J10. The remaining jump-
Table 1. eZ80AcclaimPlus! Development Board Jumper Settings
State
Function
In
On-board Flash is disabled for writing.
Out
On-board Flash is enabled for writing.
1–2
USB Powered.
2–3
Wall Powered.
In
RTC is powered by on-board V
CC
Out
External 3.3V source should be connected to J26.2
1–2
Pin L12 of U1 (PD1_RXD0) is connected to J10.61
2–3
Pin L12 of U1 (PD1_RXD0) is connected to U8.1
(TXD).
1–2
Pin G10 of U1 (PC1_RXD1) is connected to J10.45.
2–3
Pin G10 of U1 (PC1_RXD1) is connected to U10.12
(R1OUT).
1–2
Pin F12 of U1 (PC3_CTS1) is connected to J10.41.
2–3
Pin F12 of U1 (PC3_CTS1) is connected to U10.9
(R2OUT).
on page 18.
Appendix B. Sche-
.
CC
UM024401-0412
Factory
Setting
In
In
In
In
In
In
In
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