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4.7
MDIO User Command Complete Interrupt (Unmasked) Register (USERINTRAW)
The MDIO user command complete interrupt (unmasked) register (USERINTRAW) is shown in
and described in
Table
Figure 31. MDIO User Command Complete Interrupt (Unmasked) Register (USERINTRAW)
31
15
LEGEND: R/W = Read/Write; R = Read only; W1C = Write 1 to clear (writing a 0 has no effect); -n = value after reset
Table 29. MDIO User Command Complete Interrupt (Unmasked) Register (USERINTRAW)
Bit
Field
31-2
Reserved
1
USERACCESS1
0
USERACCESS0
SPRUFL5B – April 2011
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29.
Reserved
Reserved
R-0
Field Descriptions
Value
Description
0
Reserved
MDIO User command complete event bit. When asserted, the bit indicates that the previously
scheduled PHY read or write command using the USERACCESS1 register has completed.
Writing a 1 will clear the event, writing a 0 has no effect.
0
No MDIO user command complete event.
1
The previously scheduled PHY read or write command using MDIO user access register
USERACCESS1 has completed.
MDIO User command complete event bit. When asserted, the bit indicates that the previously
scheduled PHY read or write command using the USERACCESS0 register has completed.
Writing a 1 will clear the event, writing a 0 has no effect.
0
No MDIO user command complete event.
1
The previously scheduled PHY read or write command using MDIO user access register
USERACCESS0 has completed.
© 2011, Texas Instruments Incorporated
R-0
2
MDIO Registers
Figure 31
16
1
0
USERACCESS1 USERACCESS0
R/W1C-0
R/W1C-0
EMAC/MDIO Module
75
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