Operation Of The Hsc - Siemens SIMATIC S7-1200 Manual

6.6.1

Operation of the HSC

The high-speed counter (HSC) counts events that occur faster than the OB execution rate. If
the events to be counted occur within the execution rate of the OB, you can use CTU, CTD,
or CTUD counter instructions. If the events occur faster than the OB execution rate, then use
the HSC. The CTRL_HSC instruction allows your user program to programmatically change
some of the HSC parameters.
For example: You can use the HSC as an input for an incremental shaft encoder. The shaft
encoder provides a specified number of counts per revolution and a reset pulse that occurs
once per revolution. The clock(s) and the reset pulse from the shaft encoder provide the
inputs to the HSC.
The HSC is loaded by the user program with the first of several presets, and the outputs are
activated by the user program for the time period where the current count is less than the
current preset. The user program configures the HSC to provide an interrupt when the
counter value is equal to the reference value (or CV = RV), when a reset occurs, and also
when there is a direction change.
As each CV = RV interrupt event occurs, the user program loads a new reference value and
sets the next state for the outputs inside the CV = RV interrupt OB. When the reset interrupt
event occurs, the user program loads the first reference value and sets the first output states
in the reset-interrupt OB, and the cycle is repeated.
Since the interrupts occur at a much lower rate than the counting rate of the HSC, precise
control of high-speed operations can be implemented with relatively minor impact to the scan
cycle of the CPU. The method of interrupt attachment allows each load of a new preset to be
performed in a separate interrupt routine for easy state control. (Alternatively, all interrupt
events can be processed in a single interrupt routine.)
Table 6- 28
HSC
HSC1
HSC2
HSC3
HSC4
HSC5
HSC6
Easy Book
Manual, 11/2011, A5E02486774-04
Maximum frequency (KHz)
CPU
High-speed SB
SB
CPU
High-speed SB
SB
CPU
CPU
CPU
High-speed SB
SB
CPU
High-speed SB
SB
Programming made easy
6.6 High-speed counter (HSC)
Single phase
100 KHz
200 KHz
30 KHz
100 KHz
200 KHz
30 KHz
100 KHz
30 KHz
30 KHz
200 KHz
30 KHz
30 KHz
200 KHz
30 KHz
Two phase and
AB quadrature
80 KHz
160 KHz
20 KHz
80 KHz
160 KHz
20 KHz
80 KHz
20 KHz
20 KHz
160 KHz
20 KHz
20 KHz
160 KHz
20 KHz
117