Siemens SIMATIC S7-1200 Manual page 119

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Input addresses for the HSC
Note
The digital I/O points used by high-speed counter devices are assigned during device
configuration. When digital I/O point addresses are assigned to these devices, the values of
the assigned I/O point addresses cannot be modified by the force function in a watch table.
When you configure the CPU, you have the option to enable and configure each HSC. The
CPU automatically assigns the input addresses for each HSC according to its configuration.
(Some of the HSCs allow you to select whether to use either the on-board inputs of the CPU
or the inputs of an SB.)
NOTICE
As shown in the following tables, the default assignments for the optional signals for the
different HSCs overlap. For example, the optional external reset for HSC 1 uses the same
input as one of the inputs for HSC 2.
Always ensure that you have configured your HSCs so that any one input is not being used
by two HSCs.
For example, the following table shows the HSC input assignments for both the on-board I/O
of the CPU 1212C and an SB. (If the SB has only 2 inputs, only 4.0 and 4.1 inputs are
available.)
● For single-phase: C is the Clock input, [d] is the optional direction input, and [R] is an
● For two-phase: CU is the Clock Up input, CD is the Clock Down input, and [R] is an
● For AB-phase quadrature: A is the Clock A input, B is the Clock B input, and [R] is an
Table 6- 30
HSC input assignments for CPU 1212C
HSC
HSC 1
1-phase
1
2-phase
AB-phase
HSC 2
1-phase
1
2-phase
AB-phase
HSC 3
1-phase
2-phase
AB-phase
HSC 4
1-phase
2-phase
Easy Book
Manual, 11/2011, A5E02486774-04
optional external reset input. (Reset is available only for "Counting" mode.)
optional external reset input. (Reset is available only for "Counting" mode.)
optional external reset input. (Reset is available only for "Counting" mode.)
CPU on-board input (0.x)
0
1
C
[d]
CU
CD
A
B
[R]
[R]
[R]
2
3
4
5
[R]
[R]
[R]
C
[d]
CU
CD
A
B
C
[d]
CU
CD
A
B
[R]
[R]
Programming made easy
6.6 High-speed counter (HSC)
SB input (4.x)
6
7
0
1
C
[d]
CU
CD
A
B
[R]
[R]
[R]
[R]
[R]
[R]
C
[d]
CU
CD
3
2
3
[R]
[R]
[R]
C
[d]
CU
CD
A
B
119

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