Configure The Vmebus Interface - Motorola MVME2700 Series Installation And Use Manual

CNFG and ENV Commands
6

Configure the VMEbus Interface

6-12
L2 Cache Parity Enable [On-Detection/Always/Never - O/A/N] = O?
L2 Cache parity is enabled upon detection. (Default)
O
L2 Cache parity is always enabled.
A
L2 Cache parity is never enabled.
N
PCI Interrupts Route Control Registers (PIRQ0/1/2/3) = 0A0B0E0F?
Initializes the PIRQx (PCI Interrupts) route control registers in the IBC
(PCI/ISA bus bridge controller). The ENV parameter is a 32-bit value that
is divided by 4 to yield the values for route control registers PIRQ0/1/2/3.
The default is determined by system type. For details on PCI/ISA interrupt
assignments and for suggested values to enter for this parameter, refer to
the 8259 Interrupts section in the MVME2600/2700 Series Single Board
Computer Programmer's Reference Guide.
Serial Startup Code Master Enable [Y/N] = N?
Y
N
Serial Startup Code LF Enable [Y/N] = N?
Y
N
ENV asks the following series of questions to set up the VMEbus interface
for MVME2600/MVME2700/MVME3600/MVME4600 series VME
modules. To perform this configuration, you should have a working
knowledge of the Universe II ASIC as described in the Programmer's
Reference Guide.
Set up and enable the serial I/O ports.
Do not set up or enable the serial I/O ports (Default).
Enable line feeds at the serial I/O ports.
Do not enable line feeds at the serial I/O ports
(Default).
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