Appendix B: Status model
The bits in the Status Byte Register are described in the following table.
Bit
Decimal
value
0
1
2
3
4
5
6
7
Service Request Enable Register
This register is programmed by the user and is used to enable or disable the setting of bit B6
(RQS/MSS) by the Status Summary Message bits (B0, B1, B2, B3, B4, B5, and B7) of the Status
Byte Register. As shown in the
performed on the summary bits (&) with the corresponding enable bits of the Service Request Enable
Register. When a logical AND operation is performed with a set summary bit (1) and with an enabled
bit (1) of the enable register, the logic "1" output is applied to the input of the logical OR gate and,
therefore, sets the MSS/RQS bit in the Status Byte Register.
You can set or clear the individual bits of the Service Request Enable Register by using the *SRE
common command or status.request_enable. To read the Service Request Enable Register,
use the *SRE? query or print(status.request_enable). The Service Request Enable Register
clears when power is cycled or a parameter value of 0 is sent with a status request enable command
(for example, a *SRE 0 or status.request_enable = 0 is sent). You can program and read the
SRQ Enable Register using the following commands.
Description
Read the Status Request Enable
Register
Enable bits in the Status Request
Enable Register
B-12
Bit name
1
Measurement summary Bit (MSB)
2
Not used
4
Error available (EAV)
8
Questionable summary bit (QSB)
16
Message available (MAV)
32
Event summary bit (ESB)
64
Request for service (RQS)/Master summary
status (MSS)
128
Operation summary bit (OSB)
Status Byte Register
SCPI command
*SRE
*SRE
2470 High Voltage SourceMeter Instrument Reference Manual
When set, indicates the following
has occurred:
An enabled questionable event
Not applicable
An error is present in the error queue
(warning and information messages do
not affect this bit)
An enabled questionable event
A response message is present in the
output queue
An enabled standard event
An enabled summary bit of the Status
Byte Register is set; depending on
how it is used, this is either the
Request for Service (RQS) bit or the
Master Summary Status (MSS) bit
An enabled operation event
(on page B-10) topic, a logical AND operation is
(on page A-7)
(on page A-7)
TSP command
status.request_enable
(on page
14-188)
status.request_enable
(on page
14-188)
2470-901-01 Rev. A / May 2019
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