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Stack Pointer – SP
Program and Data
Addressing Modes
Register Direct, Single
Register Rd
ATtiny26(L)
10
The ATtiny26(L) Stack Pointer is implemented as an 8-bit register in the I/O space loca-
tion $3D ($5D). As the ATtiny26(L) data memory has 224 ($E0) locations, eight bits are
used.
Bit
7
6
$3D ($5D)
SP7
SP6
Read/Write
R/W
R/W
Initial Value
0
0
The Stack Pointer points to the data SRAM stack area where the Subroutine and Inter-
rupt Stacks are located. This Stack space in the data SRAM must be defined by the
program before any subroutine calls are executed or interrupts are enabled. The Stack
Pointer must be set to point above $60. The Stack Pointer is decremented by one when
data is pushed onto the Stack with the PUSH instruction, and it is decremented by two
when an address is pushed onto the Stack with subroutine calls and interrupts. The
Stack Pointer is incremented by one when data is popped from the Stack with the POP
instruction, and it is incremented by two when an address is popped from the Stack with
return from subroutine RET or return from interrupt RETI.
The ATtiny26(L) AVR Enhanced RISC microcontroller supports powerful and efficient
addressing modes for access to the Flash program memory, SRAM, Register File, and
I/O Data memory. This section describes the different addressing modes supported by
the AVR architecture. In the figures, OP means the operation code part of the instruction
word. To simplify, not all figures show the exact location of the addressing bits.
Figure 5. Direct Single Register Addressing
The operand is contained in register d (Rd).
5
4
3
SP5
SP4
SP3
R/W
R/W
R/W
0
0
0
2
1
0
SP2
SP1
SP0
R/W
R/W
R/W
0
0
0
1477G–AVR–03/05
SP
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