Dual Data Pointer Register - Atmel AT89C5130A-M Manual

7. Dual Data Pointer Register

Figure 7-1. Use of Dual Pointer
7
AUXR1(A2H)
4337K–USB–04/08
The additional data pointer can be used to speed up code execution and reduce code size.
The dual DPTR structure is a way by which the chip will specify the address of an external data
memory location. There are two 16-bit DPTR registers that address the external memory, and a
single bit called DPS = AUXR1.0 (see Table 7-1) that allows the program code to switch
between them (see Figure 7-1).
0
DPS
DPH(83H) DPL(82H)
Table 7-1. AUXR1 Register
AUXR1- Auxiliary Register 1(0A2h)
7 6
-
Bit Bit
Number Mnemonic
7 -
6 -
5 ENBOOT
4 -
3 GF3
2 0
1 -
0 DPS
Reset Value = XX[BLJB]X X0X0b
Not bit addressable
a. Bit 2 stuck at 0; this allows to use INC AUXR1 to toggle DPS without changing GF3.
DPTR1
DPTR0
5 4
- ENBOOT -
Description
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Enable Boot Flash
Cleared to disable boot ROM.
Set to map the boot ROM between F800h - 0FFFFh.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
This bit is a general-purpose user flag.
Always cleared.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Data Pointer Selection
Cleared to select DPTR0.
Set to select DPTR1.
AT89C5130A/31A-M
External Data Memory
3 2 1
GF3 0 -
0
DPS
27