Fpga In System Programming - Sundance Spas SMT398 User Manual

Version 1.1.1

FPGA in system programming

The factory default for the FPGA configuration mode is using Slave SelectMAP mode
and the ComPort3.
Configuring the FPGA from ComPort 3 allows NOT USING any JTAG cables.
Having a direct link enhances debugging and testing, and therefore reduces the
product's time to market.
Once the design is complete, the configuration data can be stored on disk and then
loaded each time the system powers up or is reset. The configuration cycle can be
transparent to the end user.
The bitstream is presented on Commport3 and the CPLD provides the mechanism to
deliver it quickly to the Virtex-II device using the Slave SelectMAP mode.
After configuration the Commport3 can be available to the FPGA for data transfers if
the Virtex II is XC2V3000 or above and if your CPLD design version allows it.
Host software can be developed to communicate with the SMT398.
See SMT6025 User Manual on Sundance Web site for more information on how to
develop Host applications for Sundance Hardware.
The host Software application BitstreamLd.exe provided is compiled for Windows
NT/2000.
It allows downloading a bitstream to the SMT398 FPGA.
The DSP software routines provided are the download functions LoadBitstream() and
FPGAFullConfiguration().
• LoadBitstream():This function reads a bit file from your local HD and stores it
on the DSP board.
• FPGAFullConfiguration(): The FPGA is configured with data from a .bit file
stored on your DSP board.
This code can be recompiled for any C6x-processor-board you want to use under
Code Composer Studio and/or 3L Diamond.
• Bit2Asm.exe. This stand alone executable formats a bit file into a Texas
instrument's asm file. Then you can embed it in your application's object file at
linking time. As a result, the FPGA bitstream is downloaded with the
application into the DSP module's memory which provides a faster FPGA
configuration process than the standard way.
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