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Version 1.1.1
JTAG/Multilinx headers
The JTAG/Multilinx headers have the following pinout:
15
16
RST
13
INIT
14
11
TMS
12
PROG
TCK
9
10
D0
DONE
7
TDI
8
TRIG
5
6
CCLK
4
TDO
3
GND
RT
1
2
3.3V
J13
Figure 13: Top View of JTAG/Multilinx headers
JTAG/Boundary scan pinout (J13)
Name
Pin Function
VCC
2
Power.
Supplies VCC (3.3V, 10 mA, typically) to the cable.
GND
4
Ground.
Supplies ground reference to the cable.
TCK
9
Test Clock.
This clock drives the test logic for all devices on
boundary-scan chain.
TDO
3
Read Data.
Read back data from the target system is read at this
pin.
TDI
7
Test Data In.
This signal is used to transmit serial test instructions
and data.
TMS
11
Test Mode Select.
This signal is decoded by the TAP controller to control
test operations.
Table 9: Connector J13-JTAG Header
Page 36 of 38
15
16
BUSY
D7
13
14
RDWR
D6
11
12
D5
WS
9
10
D4
7
8
D3
D2
5
6
4
3
D1
1
2
D0
CS
J12
SMT398 User Manual
Connections
To target
system VCC
To target
system
ground
Connect to
system TCK
pin.
Connect to
system TDO
pin.
Connect to
system TDI
pin.
Connect to
system TMS
pin.
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