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Version 1.1.1
Page 33 of 38
SMT398 User Manual
Figure 11: SMT398 Components placement-Bottom view
U1 : Xilinx FPGA
U2: Xilinx CPLD
U3: ZBTRAM Bank1
U4: ZBTRAM Bank2
U5: ZBTRAM Bank3
U6: ZBTRAM Bank4
U10: QDR Bank1
U11: QDR Bank2
These 2 Banks share the same address lines (See
Figure 7:SMT398 QDR Width expansion arrangement.)
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