Introduction; Related Documents; Block Diagram; Figure 1:Smt398 Block Diagram - Sundance Spas SMT398 User Manual

Version 1.1.1

Introduction

Related Documents

SUNDANCE SHB specification
Sundance SDB specification.
TI TIM specification & user's
Samtec QSH Catalogue page

Block Diagram

SelectMAP Header
JTAG Header
Xilinx XC95288 CS280 CPLD
on Comm-Port #0 and #3
and Config&Timer&control
Sundance Digital Bus
or Sundance High-speed Bus
connector x4
4 LEDs or
4 I/O pins

Figure 1:SMT398 Block Diagram

Page 7 of 38
guide.
J1 Top Primary TIM
16 I/O pins
Virtex-II FF896/1152
XC2V1000 - XC2V8000
432 to 824 I/O Pins
240 I/O Pins
J3 Global Expansion
Connector
Connector
Comm-Port 0 & 3
FPGA
120 I/O pins; 16-bit data
1.5V Core
1.5V/3.3V I/O
183 I/O pins; 16-bit data
J2 Bottom Primary TIM
Connector
4xComm-Port/SDL 1;2;4 & 5
SMT398 User Manual
On-board
Oscillator
External Clock Clk
2, 4 Mbytes QDR-SRAM
2x (1 or 2Mx18)
2,4,8 or 16Mbytes ZBT-
RAM as SMT358