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TMS320C6455
SPRS276M – MAY 2005 – REVISED MARCH 2012
7.14.3.2 EMAC RMII Electrical Data/Timing
The RMREFCLK pin is used to source a clock to the EMAC when it is configured for RMII operation. The
RMREFCLK frequency should be 50 MHz ±50 PPM with a duty cycle between 35% and 65%, inclusive.
Table 7-81. Timing Requirements for RMREFCLK - RMII Operation
(see Figure 7-65)
NO.
1 t Pulse duration, RMREFCLK high
w(RMREFCLKH)
2 t Pulse duration, RMREFCLK low
w(RMREFCLKL)
3 t Transition time, RMREFCLK
t(RMREFCLK)
RMREFCLK
(Input)
Table 7-82. Switching Characteristics Over Recommended Operating Conditions for EMAC RMII Transmit
(see Figure 7-66)
NO.
1 t
d(RMREFCLKH-RMTXD)
(1) For RMII, transmit selected signals include: RMTXD[1:0] and RMTXEN.
RMREFCLK
(Input)
RMTXD1-RMTXD0,
RMTXEN (Outputs)
Figure 7-66. EMAC Transmit Interface Timing [RMII Operation]
210 C64x+ Peripheral Information and Electrical Specifications
PARAMETER
1
Figure 7-65. RMREFCLK Timing
10/100 Mbit/s
PARAMETER
Delay time, RMREFCLK high to transmit selected signals valid

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TMS320C6455
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-720
-850
A-1000/-1000
UNIT
-1200
MIN MAX
7 13 ns
7 13 ns
2 ns
-720
-850
A-1000/-1000
UNIT
-1200
1000 Mbps
MIN MAX
3 10 ns