Table Of Contents - Texas Instruments TMS320C6455 Manual

www.ti.com
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1 Features
1.1 CTZ/GTZ/ZTZ BGA Package (Bottom View)
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1.2 Description
1.3 Functional Block Diagram
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Revision History
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2 Device Overview
2.1 Device Characteristics
2.2 CPU (DSP Core) Description
2.3 Memory Map Summary
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2.4 Boot Sequence
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2.5 Pin Assignments
2.6 Signal Groups Description
2.7 Terminal Functions
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2.8 Development
3 Device Configuration
3.1 Device Configuration at Device Reset
3.2 Peripheral Configuration at Device Reset
3.3 Peripheral Selection After Device Reset
3.4 Device State Control Registers
3.5 Device Status Register Description
3.6 JTAG ID (JTAGID) Register Description
3.7 Pullup/Pulldown Resistors
3.8 Configuration Examples
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4 System Interconnect
4.1 Internal Buses, Bridges, and Switch Fabrics
4.2 Data Switch Fabric Connections
4.3 Configuration Switch Fabric
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4.4 Bus Priorities
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5 C64x+ Megamodule
5.1 Memory Architecture
5.2 Memory Protection
5.3 Bandwidth Management
5.4 Power-Down Control
5.5 Megamodule Resets
5.6 Megamodule Revision
Copyright © 2005-2012, Texas Instruments Incorporated
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1
5.7 C64x+ Megamodule Register Descriptions
6 Device Operating Conditions
2
6.1 Absolute Maximum Ratings Over Operating Case
2
Temperature Range (Unless Otherwise Noted)
4
6.2 Recommended Operating Conditions
6
6.3 Electrical Characteristics Over Recommended
7
Ranges of Supply Voltage and Operating Case
7
Temperature (Unless Otherwise Noted)
8
7 C64x+ Peripheral Information and Electrical
Specifications
11
13 7.1 Parameter Information
7.2 Recommended Clock and Control Signal Transition
16
Behavior
20
7.3 Power Supplies
26
7.4 Enhanced Direct Memory Access (EDMA3)
51
Controller
55
7.5 Interrupts
55
7.6 Reset Controller
57
7.7 PLL1 and PLL1 Controller
58
7.8 PLL2 and PLL2 Controller
60
7.9 DDR2 Memory Controller
71
7.10 External Memory Interface A (EMIFA)
73
7.11 I2C Peripheral
74
7.12 Host-Port Interface (HPI) Peripheral
74
7.13 Multichannel Buffered Serial Port (McBSP)
77
7.14 Ethernet MAC (EMAC)
77
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7.15 Timers
78
7.16 Enhanced Viterbi-Decoder Coprocessor (VCP2)
80
7.17 Enhanced Turbo Decoder Coprocessor (TCP2)
82
7.18 Peripheral Component Interconnect (PCI)
83
7.19 UTOPIA
83
7.20 Serial RapidIO (SRIO) Port
85
7.21 General-Purpose Input/Output (GPIO)
86
7.22 Emulation Features and Capability
87
8 Mechanical Data
87
8.1 Thermal Data
88
8.2 Packaging Information
TMS320C6455
TMS320C6455
SPRS276M - MAY 2005 - REVISED MARCH 2012
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