Spi - Serial Peripheral Interface Bus; Spi Signal Definition; Table 32: Spi Interface Signal Definition - Advantech SOM-5992 Design Manual

2.11 SPI – Serial Peripheral Interface Bus
The SPI bus is used to support SPI-compatible flash devices. The SPI flash device can be up to 16 MB
(128 Mb). The SPI bus is clocked at either 20 MHz, 25 MHz, 33 MHz or 50 MHz. SPI devices selected
should support one of these frequencies.
In COM.0 Rev 2, the SPI interface was defined as a 3.3V interface. With COM.0 Rev 3, the SPI interface
may be either 3.3V or 1.8V, as is best for the Module chipset at hand.

2.11.1 SPI Signal Definition

Table 32 : SPI Interface Signal Definition
Signal Pin#
SPI_CS# B97
SPI_MISO A92
SPI_MOSI A95
SPI_CLK A94
Description
Chip select for Carrier Board SPI – may be
sourced from chipset SPI0 or SPI1
Carrier Board:
Connect to SPI flash pin 1 Chip Select
N/C if not used
Data in to Module from Carrier SPI
Carrier Board:
Connect 15~33Ω in series to SPI flash pin 2 Serial
Output
N/C if not used
Data out from Module to Carrier SPI
Carrier Board:
Connect 33~47 Ω in series to SPI flash pin 5 Serial
Input
N/C if not used
Clock from Module to Carrier SPI
Carrier Board:
Connect 33~47 Ω in series to SPI flash pin 6 Clock
N/C if not used
９２
I/O Note
O CMOS
3.3V Suspend
or 3.3V S0
1.8V Suspend
or 1.8V S0
I CMOS
3.3V Suspend
or 3.3V S0
1.8V Suspend
or 1.8V S0
O CMOS
3.3V Suspend
or 3.3V S0
1.8V Suspend
or 1.8V S0
O CMOS
3.3V Suspend
or 3.3V S0
1.8V Suspend
or 1.8V S0