Advantech SOM-5992 Design Manual page 7

List of Figures
Figure 1: SOM-5992 Block Diagram .............................................................................................. １２
Figure 2: COM Express Type7 Connector Layout ................................................................... １５
Figure 3: PCI Express Insertion Loss Budget with Slot Card ................................................ ３６
Figure 4: PCI Express Insertion Loss Budget with Carrier Board PCIe Device .................. ３８
Figure 5: Topology for PCI Express Slot Card. ........................................................................ ４０
Figure 6: Topology for PCI Express Device Down. ................................................................. ４０
Figure 7: Topology for NC-SI. ..................................................................................................... ４３
Figure 8: 10G Ethernet Design for Fiber PHY with Broadwell DE ........................................ ５３
Figure 9: 10G Ethernet Design for Copper PHY with Broadwell DE .................................... ５４
Figure 10: 10G Ethernet Design for Fiber PHY with Future SoC .......................................... ５５
Figure 11: 10G Ethernet Design for Copper PHY with Future SoC ...................................... ５６
Figure 12: 10G Ethernet AC coupling - backplane system .................................................... ５７
Figure 13: 10G Ethernet AC coupling - direct cable ............................................................... ５７
Figure 14: 10G Ethernet AC coupling - PHY on Carrier ......................................................... ５７
Figure 15: 10GBASE-KR Trace Length Budget ....................................................................... ５８
Figure 16: 10/100/1000 Ethernet Insertion Loss Budget ........................................................ ６４
Figure 17: Topology for Ethernet Jack ....................................................................................... ６５
Figure 18: USB 2.0 Insertion Loss Budget ................................................................................ ７０
Figure 19: USB 2.0 Good Downstream Power Connection ................................................... ７２
Figure 20: USB 2.0 A Common Mode Choke ........................................................................... ７２
Figure 21: Topology for USB2.0 ................................................................................................. ７４
Figure 22: USB3.0 Insertion Loss Budget ................................................................................. ７９
Figure 23: Topology for USB3.0 ................................................................................................. ８０
Figure 24: SATA Insertion Loss Budge ..................................................................................... ８２
Figure 25: Topology for SATA ..................................................................................................... ８５
Figure 26: Typical routing topology for a Module LPC device ............................................... ８９
Figure 27: Topology for LPC ....................................................................................................... ９１
Figure 28: BIOS Selection LPC Mode ....................................................................................... ９６
Figure 29: BIOS Selection eSPI Mode ...................................................................................... ９６
Figure 30: Topology for SPI ......................................................................................................... ９９
Figure 31: Topology for I2C ..................................................................................................... １０２
Figure 32: Topology for SMB .................................................................................................. １０５
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