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Advantech MIC-3399 User Manual

Advantech MIC-3399 User Manual

6u compactpci blade sbc with 6th gen. intel core i3/i5/i7 processor and optional ecc memory
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User Manual
MIC-3399
6U CompactPCI Blade SBC with
6th Gen. Intel® Core™ i3/i5/i7
Processor and Optional ECC
Memory

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Summary of Contents for Advantech MIC-3399

  • Page 1 User Manual MIC-3399 6U CompactPCI Blade SBC with 6th Gen. Intel® Core™ i3/i5/i7 Processor and Optional ECC Memory...
  • Page 2 The documentation and the software included with this product are copyrighted 2020 by Advantech Co., Ltd. All rights are reserved. Advantech Co., Ltd. reserves the right to improve the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of Advantech Co., Ltd.
  • Page 3 This equipment is compliant with the specifi- cations for Class I, Division 2, Groups A, B, C, and D indoor hazards. Technical Support and Assistance Visit the Advantech website at http://support.advantech.com to obtain the latest product information. Contact your distributor, sales representative, or Advantech’s customer service center for technical support if you need additional assistance.
  • Page 4 Please send all such feedback in writing to support@advantech.com. Packing List Before system installation, check that the items listed below are included and in good condition. 1 x MIC-3399 all-in-one single-board computer (CPU heatsink and PCH heat-  sink included) 1 x Daughter board for SATA HDD (assembled) ...
  • Page 5 In accordance with the IEC 704-1:1982 specifications, the sound pressure level at the operator’s position does not exceed 70 dB (A). DISCLAIMER: These instructions are provided according to IEC 704-1 standards. Advantech disclaims all responsibility for the accuracy of any statements contained herein. MIC-3399 User Manual...
  • Page 6 We Appreciate Your Input Please let us know of any aspect of the product could use improvement or correction. We appreciate your valuable input in helping to make our products better. MIC-3399 User Manual...
  • Page 7 Remote management communication protocol RS-232 Recommended standard 232 Real-time clock Rear transition module SATA Serial advanced technology attachment Sensor data record System event log Serial presence detect Serial peripheral interface Software UART Universal asynchronus receiver transmitter Universal serial bus MIC-3399 User Manual...
  • Page 8 MIC-3399 User Manual viii...

  • Page 9: Table Of Contents

    Table 1.14:SW5 and SW6 for COM2 ......... 12 Connector Definitions................13 Table 1.15:Onboard Connector Descriptions ......13 Figure 1.2 MIC-3399 Front Panel Ports, Indicators, and Buttons ..................13 Figure 1.3 RIO-3316-C1E Front Panel Ports and Indicators ..13 Safety Precautions .................. 13 Hardware Installation ................
  • Page 10 Save & Exit ................. 50 Figure 2.35Save & Exit............... 50 Chapter IPMI Configuration ......51 Introduction ..................... 52 Terms and Definitions ................53 IPMI Interfaces..................54 Figure 3.1 Management Block Diagram ........54 3.3.1 IPMB-0..................54 3.3.2 KCS .................... 54 MIC-3399 User Manual...
  • Page 11 Table 3.22:Board Info Area-SKU3..........71 3.10.1 Product Information..............72 Table 3.23:Product Info Area............72 Appendix A Pin Assignments .......73 J1 Connector................... 74 Table A.1: J1 CompactPCI I/O........... 74 J2 Connector................... 75 Table A.2: J2 CompactPCI I/O........... 75 MIC-3399 User Manual...
  • Page 12 Table A.13:Front Panel LED Indicators ........81 Appendix B Programming the Watchdog Timer . 83 Appendix C FPGA Specifications......85 Overview ....................86 Features....................86 FPGA I/O Registers ................86 Table C.1: LPC I/O Registers Address ........86 MIC-3399 User Manual...

  • Page 13: Chapter 1 Hardware Configuration

    Chapter Hardware Configuration This chapter describes how to configure the MIC-3399 hardware.

  • Page 14: Introduction

    J3 using a high-speed UHM connector with certain configu- rations. Designed for harsh environments, MIC-3399 can be installed via a standard Com- pactPCI system slot and is ideal for datacom, telecom, military, medical, defense, and other vertical segment applications. Compliant with PICMG 2.1/2.16/2.9/2.0 Rev 3.0 specifications, MIC-3399 supports 64-bit PCI bus extensions (66/33 MHz) for up to six CompactPCI slots at +3.3 V or +5 V VIO.

  • Page 15: Processor

    1.2.2 Processor MIC-3399 supports a 6th gen. Intel® Core™ i3/i5/i7/Xeon® E3 processor with clock frequencies of up to 2.8 GHz and a Direct Media Interface (DMI) of up to 8 GT/s. Contact your local distributor or sales representative for more informations regarding processor configurations.

  • Page 16: Memory

    1.2.4 Memory MIC-3399 features up to 16 GB onboard DDR4 memory with the Intel® Core™/ Xeon® processor offering support for optional ECC memory. The system also has one 260-pin SODIMM socket that can accommodate an additional 4 GB SODIMM(up to 16 GB max.). The following table lists the SODIMM modules that have been tested with MIC-3399.

  • Page 17: Serial Ports

    1.2.8 USB Port MIC-3399 provides three USB 3.0 type-A ports on the front panel and up to six USB 2.0 and three USB 3.0 interfaces via a J3/J5-to-CompactPCI connector. The MIC- 3399 USB interfaces comply with USB, R2.0 and 3.0, specifications and are fuse pro- tected (5 V @ 1.1 A).

  • Page 18: I/O Connectivity

    1.2.13 I/O Connectivity The MIC-3399 front panel I/O includes two RJ45 Gigabit Ethernet, one RJ45 COM, three USB 3.0, one VGA, and one XMC knockout. Rear I/O connectivity is available via CompactPCI connectors as listed below. Different J3 connector types can be configured as HM or uHM to enable different SATA/PCIe extension speeds.

  • Page 19: Mechanical And Environmental Specifications

    1.2.16 Compact Mechanical Design Forced air cooling in the chassis is recommended for MIC-3399 to optimize the sys- tem stability and reliability although a special Cu-designed heatsink is included in the unit.

  • Page 20: Functional Block Diagram

    Figure 1.1 MIC-3399 Functional Block Diagram Jumpers and Switches The jumper and switch functions are listed in Tables 1.4 and 1.5. Read this section carefully before modifying the jumper and switch settings on the MIC-3399 board. Table 1.4: Jumper Descriptions Number...

  • Page 21: Jumper Settings

    This jumper is used to configure the LVDS power settings. Table 1.7: JLVDS1 Settings Status Function Note Closed 1-2 LVDS for 3.3V LVDS panel [default] Closed 2-3 LVDS for 5V LVDS panel JLVDS1 Closed 1-2 JLVDS1 Closed 2-3 MIC-3399 User Manual...

  • Page 22: Switch Settings

    Rear I/O 1.4.2.3 PCI Bridge Master/Drone Mode (SW2-3) This switch is used to switch the PCI bridge between Master and Drone modes. Table 1.10: SW2-3 Switch PCI Bridge Mode Status Function Note Drone mode Master mode [default] MIC-3399 User Manual...
  • Page 23 This switch is used to configure the PCIe mode settings. Table 1.12: SW4 PCIE Mode Settings Status Function Note XMC:1 x PCIe x8 [default] Off/Off/On/X Rear J3: 1 x PCIe x8 XMC:1 x PCIe x8 Off/On/On/X Rear J3: 4 x PCIe x4 MIC-3399 User Manual...

  • Page 24: Rio-3316-C1E Dip Switch Settings

    Table 1.13: SW3 and SW4 for Internal COM1 Status Function Note [Default] RS-232 RS-422 RS-485 Table 1.14: SW5 and SW6 for COM2 Status Function Note [Default] RS-232 RS-422 RS-485 These switches are only available for the RIO-3316-C1E model. MIC-3399 User Manual...

  • Page 25: Connector Definitions

    USB3.0/USB2.0 Hot Swap Led Reset Storage Led LAN1 Power Led LAN2 BMC Led Master /Drone Led Figure 1.2 MIC-3399 Front Panel Ports, Indicators, and Buttons USB2.0 PS/2 DVI-D LAN3 Power LED (green) 2.16 USB3.0 DVI-I LAN4 HDD LED Figure 1.3 RIO-3316-C1E Front Panel Ports and Indicators...

  • Page 26: Hardware Installation

    1.7.1 HDD Installation MIC-3399 supports a 2.5” SATA hard disk drive. The SATA HDD daughter board is pre-assembled on the MIC-3399 SBC, but the SATA HDD brackets are not. The brackets and screws are provided in the accompanying accessory box. Instructions for installing the SATA HDD are provided below.
  • Page 27 Install the SATA HDD attached to the brackets into the chassis. Connect the SATA HDD to the SATA connector. Fasten the HDD in place using 4 x M2.5 screws as show in Fig. 1.6. Figure 1.6 Installing the SATA HDD into the Chassis MIC-3399 User Manual...

  • Page 28: Battery Replacement

    Battery Replacement MIC-3399 is equipped with a 3V battery (Advantech part number: CR2032). Replace- ment batteries can be purchased from Advantech. Contact your local sales represen- tative to check availability. Software Support MIC-3399 has been tested and verified to support Windows 7/10, Linux, and VxWorks 6.9/7.0 operating systems.

  • Page 29: Chapter 2 Ami Bios Setup

    Chapter AMI BIOS Setup This chapter describes how to configure the AMI BIOS.

  • Page 30: Introduction

    Introduction The AMI BIOS ROM features a built-in BIOS Setup program specifically adapted for MIC-3399 that allows users to modify the basic system configuration and function settings. The BIOS Setup program features a number of menus for adjusting various items. This chapter describes the basic navigation of the BIOS Setup menus and explains how to configure the BIOS settings.

  • Page 31: Bios Setup Utility

    Optimized defaults <F4> Save & exit <Esc> Exit Entering the BIOS When the system is powered on, press <Del> or <F2> during the BIOS power-on self test to access the BIOS Setup Utility. Figure 2.2 BIOS POST Screen MIC-3399 User Manual...

  • Page 32: Main Screen

    System Date using the <Arrow> keys. Enter new values via the keyboard. Press <Tab> or the <Arrow> keys to move between fields. The date must be entered in MM/DD/YY format, and the time must be entered in HH:MM:SS format. MIC-3399 User Manual...

  • Page 33: Platform Settings

    Serial Console, to access the submenu for that item. Use the <↑> and <↓> keys to move between items and view the item options. Figure 2.4 Platform BIOS Setup Page MIC-3399 User Manual...
  • Page 34 2.3.2.1 Serial Console Setting Figure 2.5 Serial Console Setting Console Redirection  This item allows users to enable/disable console redirection or Microsoft Win- dows Emergency Management Services (EMS). MIC-3399 User Manual...
  • Page 35 2.3.2.2 Firmware Update Figure 2.6 Firmware Update ME FW Image Re-Flash  This item allows users to enable/disable the ME firmware image re-flash func- tion. MIC-3399 User Manual...
  • Page 36 EHCI ownership changes should be conducted by the EHCI driver. Port 60/64 Emulation  This item allows users to enable/disable support for I/O port 60h/64h emulation. This should be enabled for complete USB keyboard legacy support for non-USB aware operating systems. MIC-3399 User Manual...
  • Page 37 TPM 1.2 devices. TPM 2.0 will restrict support to TPM 2.0 devices. The Auto option means both are supported, with the default set to TPM 2.0 devices. If not found, TPM 1.2 devices will be enumerated. MIC-3399 User Manual...
  • Page 38 VMM can utilize the additional hardware capabilities provided by Vanderpool Technology. Intel®VT-d  This item allows users to enable/disable VT-d capability. SR-IOV Support  This item allows users to enable/disable single root I/O virtualization support, if the system has SR-IOV-capable PCIe devices. MIC-3399 User Manual...
  • Page 39 This item allows users to configure the system to support more than two fre- quency ranges. Package C State Limit  This item allows users to configure the maximum package C state limit. CPU default: Retains the factory default value. Auto: Initiates the deepest available package C state limit. MIC-3399 User Manual...

  • Page 40: Hardware Settings

    Hardware Settings Select the Hardware tab to enter the Hardware setup menu. Users can select any item in the left frame of the screen to access the submenu for that item. Figure 2.11 Hardware BIOS Setup Page MIC-3399 User Manual...
  • Page 41 SuSE Linux 9.2, RedHat Enterprise 3 Update 3.) Hardware Prefetcher  This item allows users to enable/disable the MLC streamer prefetcher. Adjacent Cache Line Prefetch  This item allows users to enable/disable the prefetching of adjacent cache lines. MIC-3399 User Manual...
  • Page 42 2.3.3.2 Northbridge Figure 2.13 Northbridge 2.3.3.3 Memory Configuration Figure 2.14 Memory Configuration This page shows the memory information. MIC-3399 User Manual...
  • Page 43 NOTE: When the mode is switched to 2x8 PCI Express, the two PCI Express slots correspond to PEG0 and PEG1. When switched to 1 x8 and 2 x4 PCI Express, the three PCI Express slots correspond to PEG0, PEG1, and PEG2. MIC-3399 User Manual...
  • Page 44 PCI Subsystem Settings Figure 2.16 PCI Subsystem Above 4G Decoding  This item allows users to enable/disable the decoding of 64-bit-capable devices in above 4G address space (this option is only available is the system supports 64-bit PCI decoding). MIC-3399 User Manual...
  • Page 45 This item allows users to select the DVMT 5.0 pre-allocated (fixed) graphics memory size used by the internal graphics device. DVMT Total Gfx Mem  This item allows users to select the DVMT5.0 total graphics memory size used by the internal graphics device. MIC-3399 User Manual...
  • Page 46 LVDS Backlight Signal Control  This item allows users to configure the LVDS backlight signal as PWM or linear. LVDS Backlight Control PWM  This item allows users to configure the expected PWM output value (Range: 0 - 100%). MIC-3399 User Manual...
  • Page 47 2.3.3.8 Southbridge Figure 2.19 Southbridge MIC-3399 User Manual...
  • Page 48 This item allows users to configure the maximum speed the SATA controller can support and to enable/disable SATA port 1/port 2/port 3/port 4/port 5/port 6. SATA Mode Selection  This item allows users to configure the SATA controller(s) operation mode. MIC-3399 User Manual...
  • Page 49 2.3.3.10 NCT6126D Super I/O Configuration Figure 2.21 NCT6126D Super I/O Configuration Figure 2.22 SIO Uart1 to RJ45 MIC-3399 User Manual...
  • Page 50 When SIO Uart1-to-RJ45 is selected, the BMC Uart1 switch mode will be set to J3 automatically. When SIO Uart1-to-BMC J3 is selected, the BMC Uart1 switch mode will be set to RJ45 automatically. When SIO UART1-to-BMC Uart2 is selected, the BMC Uart1 switch can be set to RJ45 or J3. MIC-3399 User Manual...
  • Page 51 Figure 2.24 Serial Port Mode Serial Port1 Mode  This item allows users to set the serial port1 mode as RS-232, RS-422, or RS- 485. MIC-3399 User Manual...
  • Page 52 2.3.3.11 Serial Port 1 Configuration Figure 2.25 Serial Port1 Configuration Serial Port  This item allows users to enable/disable the serial port (COM). MIC-3399 User Manual...
  • Page 53 Serial Port  This item allows users to enable/disable the serial port (COM). Serial Port2 Mode  This item allows users to set the serial Port2 mode as RS-232, RS-422, RS-485 without term, or RS-485 with term. MIC-3399 User Manual...
  • Page 54 2.3.3.13 Serial Port 3 Configuration Figure 2.27 Serial Port 3 Configuration Serial Port  This item allows users to enable/disable the serial port (COM). MIC-3399 User Manual...
  • Page 55 2.3.3.14 Serial Port 4 Configuration Figure 2.28 Serial Port 4 Configuration Serial Port  This item allows users to enable/disable the serial port (COM). MIC-3399 User Manual...
  • Page 56 2.3.3.15 H/W Monitor Configuration Figure 2.29 H/W Monitor configuration This page shows the PC heath status information. MIC-3399 User Manual...

  • Page 57: Server Management

    This option is not available if the OS boot watchdog timer is disabled. OS Wtd Timer Policy  This item allows users to configure the system response when the OS boot watchdog time expires. This option is not available if the OS boot watchdog timer is disabled. MIC-3399 User Manual...

  • Page 58: Post & Boot

    This item allows users to view the boot priority of devices. Boot Option #1 Boot Option #2 Boot Option #3 Hard Drive BBS Priorities  This item allows users to set the boot device priority sequence from the avail- able hard disk drives. MIC-3399 User Manual...
  • Page 59 This item allows users to enable/disable GA20 active status. This option is use- ful when any RT code is executed above 1 MB. When configured as upon request, GA20 can be disabled using the BIOS. When configured as always, GA20 disabling is not allowed. MIC-3399 User Manual...
  • Page 60 This item allows users to configure the execution of the UEFI and legacy video OpROM. Other PCI Devices  This item allows users to configure the OpROM execution policy for devices other than Network, Storage, or Video. MIC-3399 User Manual...

  • Page 61: Security

    2.3.6 Security Figure 2.34 Security Settings Password Check  – Password Check: Set password check mode. – Administrator Password: Set administrator password. MIC-3399 User Manual...

  • Page 62: Save & Exit

    This item allows users to save all current settings as user defaults. Restore User Default  This item allows users to restore all settings to the user defaults. Boot Override  This item allows users to select the device to boot. MIC-3399 User Manual...

  • Page 63: Chapter 3 Ipmi Configuration

    Chapter IPMI Configuration This chapter describes IPMI con- figuration for MIC-3399.

  • Page 64: Introduction

    Introduction MIC-3399 supports the IPMI 2.0 interface and PICMG 2.9 R1.0 specification. The BMC solution is based on Advantech IPMI Core G02 and is designed around a com- bination of an NXP LPC1768 ARM Cortex-M3-based 32-bit microcontroller and a Lat- tice MachXO2 series FPGA.

  • Page 65: Terms And Definitions

    Remote management communication protocol RS-232 Recommended standard 232 Serial attached storage SATA Serial advanced technology attachment Sensor data record System event log Serial peripheral interface UART Universal asynchronous receiver transmitter Universal serial bus XMC mezzanine card (Vita 42.0) MIC-3399 User Manual...

  • Page 66: Ipmi Interfaces

    IPMI Interfaces MIC-3399 provides three main IPMI messaging interfaces to connect to the BMC. There is the IPMB-0 main messaging interface between CPCI boards, the LAN-side band interface (NCSI), and the on-board payload interface to x86 (KCS). Figure 3.1 Management Block Diagram 3.3.1...

  • Page 67: Lan

    UDP uses the IP protocol for data transmissions. Thus, the network stack must sup- port the IP and UDP protocols along with RMCP. RMCP+ was added in the IPMI v2.0 specification. It is an enhanced protocol for transferring IPMI messages and other types of payloads (e.g., serial data). MIC-3399 User Manual...

  • Page 68: Command Line Interface

    Command Line Interface In addition to the IPMI-defined interfaces, the Advantech IPMI core supports a com- mand line interface to provide rapid and easily readable system information. This can be used for debugging and error recovery as well as showing the board information and firmware status.

  • Page 69: Bmc Watchdog

    SEL. This means that local events will show up in the local BMC’s SEL as well as in the CMMs shelf-wide SEL, unless there is no filter enabled on the CMM side. The 64 KB size is sufficient to hold exactly 4096 entries of 16 bytes each. MIC-3399 User Manual...

  • Page 70: Sensors

    BMC watchdog sensor  FW progress sensor  Version change sensor  Advantech OEM sensor: integrity sensor  3.7.1 Sensor List All sensors provided by the BMC are listed in the table below. Table 3.3: BMC Sensor List Sensor ID...

  • Page 71: Threshold-Based Sensors

    PAY_DDR4_2_5-VOL 2.50 2.331 2.671 PAY_130D_1_8-VOL 1.80 1.656 1.936 PAY_DDR4_1_2-VOL 1.20 1.088 1.304 PAY_PCH_1_0-VOL 1.00 0.904 1.096 VCCST_1_0-VOL 1.00 0.904 1.096 VCCIO_0_95-VOL 0.95 0.856 1.048 MAN_LAN _0_9-VOL 0.90 0.800 1.000 PAY_VCORE-VOL 0.90 0.208 1.568 PAY_VCCSA-VOL 0.90 0.208 1.568 MIC-3399 User Manual...

  • Page 72: Temperature Sensors

    0xA0. Byte 2 satisfies the logical component, while byte 3 stands for its action. The table below shows the supported event code structure gen- erated by the integrity sensors on MIC-3399. Table 3.7: Integrity Sensor Event Data Table...

  • Page 73: Oem Ipmi Commands

    Advantech’s IANA Enterprise Number used for OEM commands is 002839h. The BMC supports all Advantech IPMI OEM commands listed in the table below. Table 3.8: OEM Command List Command...

  • Page 74: Get Multiplexer Command

    Table 3.10: Get Multiplexer Command Byte Data Field Advantech IANA ID (392800h) Multiplexer selection: Request Data 00h - 02h = reserved 03h = NIC 1 port 1 & 2...

  • Page 75: Write Mac Address Command

    MAC address copies for the mirroring feature. This means there is no change to the real HW MAC device. Table 3.13: Write MAC Address Command Byte Data Field Advantech IANA ID (392800h) MAC address number 00h = Intel(R) I210 LAN1 MAC 01h = Intel(R) I210 LAN2 MAC Request Data...

  • Page 76: Store Configuration Command

    Port) are used to select the item that should be changed; the last byte contains the new setting value. Table 3.14: Store Configuration Command Byte Data Field Advantech IANA ID (392800h) Setting 00h - 02h = reserved 03h = Bios 04h = Lan controller...
  • Page 77 00h ~ FFh = Graceful Shutdown Timeout Completion Code C7h = request data length invalid C9h = parameter out of range CBh = requested data not present Response Data D5h = not supported in present state Advantech IANA ID (392800h) Setting MIC-3399 User Manual...

  • Page 78: Read Configuration Command

    Port) are used to select the item that should be read out; the answer contains the set- ting value. Table 3.15: Read Configuration Settings Command byte data field Advantech IANA ID (392800h) Setting 00h – 02h = reserved 03h = BIOS 04h = LAN controller...

  • Page 79: Read Port 80 Command

    This command is used to read out the actual POST code of the UEFI BIOS. Table 3.16: Read Port 80 Command (BIOS POST Code) Byte Data Field Request Data Advantech IANA ID (392800h) Completion code Response Data Advantech IANA ID (392800h) POST code...

  • Page 80: Read Mac Address Command

    This command can be used to get the product MAC addresses. Table 3.17: Read MAC Address Command Byte Data Field Advantech IANA ID (392800h) MAC address number 00h = Intel(R) I210 LAN1 MAC 01h = Intel(R) I210 LAN2 MAC Request Data...

  • Page 81: Hpm.1 Upgrade Support

    CompactPCI. The Advantech IPMI core G02 supports HPM.1 updates over any of its IPMI inter- faces. The HPM.1 components implemented on the CPCI blade are listed in the table below.

  • Page 82: Board Information

    Board Information The BMC provides IPMI-defined field replaceable unit (FRU) information about the CPCI board and the connected extension modules. The MIC-3399 FRU data includes general board information such as the product name, hardware version, or serial number. A total of 2 KB of non-volatile storage space is reserved for FRU data.
  • Page 83 Board part number 96923399021 FRU file ID type/length 0xEA FRU file ID MIC-3399_sku3_fru_template_standard_0_0x.xml Additional custom Mfg. Info fields (unused) C1h (no more info fields) 0xC1 00h (unused space) 0x00 0x00 0x00 0x00 0x00 Board area checksum (calculated) MIC-3399 User Manual...

  • Page 84: Product Information

    Assert Tag type/length 0xC0 Assert Tag (unused) FRU File ID type/length 0xEA FRU File ID MIC-3399_skux_fru_template_standard_0_0x.xml Custom product info area fields (unused) C1h (no more info fields) 0xC1 00h (any remaining unused space) 0x00 Product area checksum (calculated) MIC-3399 User Manual...

  • Page 85: Appendix A Pin Assignments

    Appendix Pin Assignments This appendix provides the pin assignments.

  • Page 86: J1 Connector

    GND REQ0# PRESENT# 3.3V CLK0 AD(31) GND NC PCI_RST# GNT0# GND IPMB_PWR HEALTHY# V(I/O) INTP INTS GND INTA# INTB# INTC# INTD# GND TCK GND 5V TRST# + 12V Note! NC = No connection # = Active low MIC-3399 User Manual...

  • Page 87: J2 Connector

    AD(57) AD(63) AD(62) AD(61) AD(60) C/BE(5)# 64EN# V(I/O) C/BE(4)# PAR64 V(I/O) C/BE(7)# C/BE(6)# CLK4 GNT3# REQ4# GNT4# CLK2 CLK3 SYSEN# GNT2# REQ3# CLK1 REQ1# GNT1# REQ2# Pin Z Note! NC = No connection # = Active low MIC-3399 User Manual...

  • Page 88: J3 Connector

    LAN4_M- LAN4_M- LAN4_M- LAN4_M- DIB0+ DIB0- DIB2+ DIB2- LAN3_M- LAN3_M- LAN3_M- LAN3_M- DIA1+ DIA1- DIA3+ DIA3- LAN3_M- LAN3_M- LAN3_M- LAN3_M- DIA0+ DIA0- DIA2+ DIA2- SATA_LED# NC Note! NC = No connection # = Active low *TX-input RX-output MIC-3399 User Manual...

  • Page 89: J4 Connector

    Erase_LED * LVDS1_D2- LVDS_SPD1 KLTCTL J4_GPIO1 * LVDS1_D3+ J4_VBAT VDD_LVDS GND J4_J2PRST J4_GPIO2 * LVDS1_D3- VDD_LVDS GND Note! NC = No connection # = Active low * If these signals are used, contact your local sales representative. MIC-3399 User Manual...

  • Page 90: J5 Connector

    DCD# R_COM1_ RTM_PRE R_COM2_ R_COM2_ 20 GND R_COM1_TX DSR# RTS# DTR# R_COM1_ J5_UART_ R_COM2_ R_COM2_ 21 GND R_COM1_RTS# DTR# CTS# R_COM1_ J5_UART_ R_COM2_ R_COM2_ 22 GND R_COM1_DCD# DSR# Note! NC = No connection # = Active low MIC-3399 User Manual...

  • Page 91: On-Board Connector

    PERX_N6 +3.3V PERX_P7 PERX_N7 VPWR(+5V) -12V VPWR(+5V) PETX_P0 PETX_N0 PETX_P1 PETX_N1 VPWR(+5V) MPRE- SENT# PETX_P2 PETX_N2 PETX_P3 PETX_N3 VPWR(+5V) TBD_SDA PETX_P4 PETX_N4 PETX_P5 PETX_N5 VPWR(+5V) TBD_SCL PETX_P6 PETX_N6 PETX_P7 PETX_N7 FPGAIO1 GND CLK_100MHz+ CLK_100MHz- FPGAIO2 NC(WAKE#) NC MIC-3399 User Manual...

  • Page 92: Front I/O Connector

    Table A.10: USB3CN1, USB3CN2, USB3CN3 USB3CN1 / USB3CN2 / USB3CN3 +5V (fused) USBD1- USBD1+ SSRX- SSRX+ SSTX- SSTX+ Table A.11: COM1 (RJ45) Connector DCD# SIN (RX) DSR# SOUT(TX) RTS# DTR# CTS# Table A.12: BH1 CMOS Battery BAT_VCC MIC-3399 User Manual...

  • Page 93: M/D, Pwr, Bmc, Hdd, And Hot-Swappable Leds

    Table A.13: Front Panel LED Indicators Name Description M/D (Green) Indicates Master or Drone mode status PWR (Green) Indicates power status HDD (Yellow) Indicates HDD Read/Write Hot Swap (Blue) Indicates the board is ready to be hot-swapped. BMC (Green) Indicates BMC status MIC-3399 User Manual...
  • Page 94 MIC-3399 User Manual...

  • Page 95: Appendix B Programming The Watchdog Timer

    Appendix Programming the Watchdog Timer This appendix describes how to program the watchdog timer.
  • Page 96 The countdown starts by writing a value to LPC address 0x943. The countdown can be stopped by reading 0x944. To refresh the counter, only a value has to be written again to 0x943. If the counter expires, the watchdog is reset and the state machine goes back to IDLE state. MIC-3399 User Manual...

  • Page 97: Appendix Cfpga Specifications

    Appendix FPGA Specifications This appendix describes FPGA configuration.

  • Page 98: Overview

    FPGA and BMC. If the BMC is populated, a simple register inside the FPGA is used to control the function from the BMC. On a MIC-3399 without BMC, the FPGA controls the function itself in the same way as before.
  • Page 99 MIC-3399 User Manual...
  • Page 100 No part of this publication may be reproduced in any form or by any means, such as electronically, by photocopying, recording, or otherwise, without prior written permission from the publisher. All brand and product names are trademarks or registered trademarks of their respective companies. © Advantech Co., Ltd. 2020...

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