Multiplexor Channel; Input/Output Operation; Assembly/Status Register - RCA 70/46 Reference Manual

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Selector Channels
(Cont'd)
Multiplexor Channel
Input/Output Operation
In addition to the subchannel registers, four 32-bit registers, called
mUltiplexor registers, are provided in scratch-pad memory. These registers
are used for subchannel initiation and termination. Upon servicing a
termination interrupt of a device connected to the multiplexor channel, the
information which pertains to the completed operation is transferred from
the non-addressable main memory to the scratch-pad memory.
The multiplexor registers in scratch-pad memory are called:
Channel Address Register (CAR)
Channel Command Register-II (CCR-II)
Channel Command Register-I (CCR-I)
Assembly/Status Register
Channel Block Address Register
Each selector channel is controlled and operated via four 32-bit reg-
isters. These registers are located in scratch-pad memory and are called:
Channel Address Register ( CAR)
Channel Command Register-II (CCR-II)
Channel Command Register-I (CCR-I)
Assembly/Status Register
Channel Block Address Register
All the information that is required to control selector channel opera-
tion is contained in these registers. Data is transferred between the selector
channel and the peripheral device one byte at a time .
The multiplexor channel is standard on the 70/46 Processor, and can
address up to 256 devices.
The multiplexor channel has eight standard interface trunks each of
which can be connected to a device control electronics. This permits the
multiplexor channel to operate devices on all eight trunks simultaneously.
The limit as to the number of input/output devices that can be connected
is determined by the device control electronics.
Although the multiplexor channel can handle slow-speed devices on a
time-sharing basis, it can accommodate fast devices through a burst mode.
Burst mode operation is specified by the program, and causes a transfer of
data to occur between a specific device and main memory without time-
sharing the mUltiplexor channel with other input/output devices. If a
program is to specify burst mode, a program check is made that other
devices on the multiplexor channel have completed operation. This ensures
that data is not lost.
Data is transferred between the multiplexor channel and each peripheral
device one byte at a time.
Note: When a burst mode operation is executed the subchannel registers
are not utilized. The input/output operation is similar to a selector
channel operation and is controlled entirely by the multiplexor
registers in scratch-pad memory.
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