Instruction Formats; Rs Format - RCA 70/46 Reference Manual

INSTRUCTION
FORMATS
RR FORMAT
RX FORMAT
RS FORMAT
• The five basic instruction formats express, in general terms, the opera-
tion to be performed as follows:
RR
=
register-to-register
RX
=
register-to-indexed main memory
RS
=
register-to-main memory
SI
=
main memory and immediate operand operation
SS
=
main memory to main memory
The instruction subfields are defined as follows:
Rl1 R 2 , Ra - four-bit general register designation used for an operand
X 2 - four-bit general register designation used for indexing
B l , B2 - four-bit general register designation used for base
addressing
DI, D2 - 12-bit displacement
12 - eight-bit immediate operand
Lh L2 - four-bit operand length specification
L - eight-bit operand length specification
M - eight-bit mask
Before executing the Load Multiple, Store Multiple, and the SS format
instructions, an address look-up is performed to insure that all pages
referenced can be utilized. The time required for this address look-up is
in addition to regular staticizing time. If T
=
1 (70/46 Mode), the addi-
tional time is required. If T
=
0 (70/45 Mode), no additional time
is required.
• The contents of the general register specified by Rl is the first operand.
The contents of the general register specified by R2 is the second operand.
In floating-point operations, Rl designates the address of the floating-point
register that contains the first operand. R2 designates the floating-point
register that contains the second operand. The first and second operands
can be the same and are designated by identical Rl and R2 addresses.
Op Code
o
7 8
11 12
15
• The contents of the general register specified by Rl is the first operand.
To obtain the address of the second operand, the contents of the general
registers specified by X 2 and B2 are added to the D2 field. In floating-point
operations, Rl designates the floating-point register that contains the
first operand.
Op Code
o
7 8 11 12
15 16 19 20 31
• The RS format is used by shift instructions, branching instructions,
and load/store multiple instructions.
Op Code
o
7 8
11 12 15 16 19 20
31
9