Load Complement
(LCR)
General Description
Format
(RR)
Condition Code
Interrupt Action
Notes
Fixed-Point
Instructions
•
The two's complement of the operand in the register specified by the
second address (R
2 )
is loaded into the general register specified by the
first address (R
1 ) .
The condition code is determined by the magnitude and
the sign of the loaded operand.
o
7 8
11 12
15
•
0 - result is zero.
1 - result is less than zero.
2 - result is greater than zero.
3 - overflow.
•
Fixed-point overflow.
•
1. Zero operands remain constant and unchanged under complementa-
tion.
2. A fixed-point overflow interrupt occurs when the maximum negative
number is complemented.
3. The operand specified by the second address is unaltered.
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