RCA 70/46 Reference Manual page 31

Interrupt Flag Register
(Cont'd)
Program Interrupt
Note: If the interrupt condition is one of the four program interrupts,
the corresponding bit in the Program Mask register must also be
set to cause an interrupt.
The Interrupt Flag register is scanned on a priority basis and the
highest priority interrupts are serviced first. Each interrupt condition is
assigned a specific weight which is put into the rightmost eight bits of
General register No. 15 of the ini tiated state ( P
3
or P
4).
This weight can
be used by the program to enter the proper interrupt routine.
Note: The rightmost two bytes of General register No. 15 in P
3
or P
4
are
cleared and reloaded each time an interrupt occurs.
Table 8 lists the priority, the Interrupt Flag register position, the
program state initiated, and the weight of each of the interrupt conditions.
Table 8. Interrupt Conditions and Priority
Flag
State
Priority Interrupt Condition
*Bit Initiated
Weight
1 Power Failure
2 0
P
4
0
2 Machine Check
21
P
4
4
3 External Signal No. 1
22
P
a
8
4 External Signal No. 2 2
a
P
3
12
5
External Signal No. 3
24
P
a
16
6 External Signal No. 4
25
P
a
20
7
External Signal No. 5
2 6
P
a
24
8
External Signal No. 6
27
P
a
28
9 Interval Timer
2 8
P
a
32
10 Selecter Channel No.1
2 9
P
a
36
11 Selector Channel No. 2
2 10
P
a
40
12 Selector Channel No. 3
211
P a
44
13 Selector Channel No. 4
212
P a 48
Not used
Not used
16 Multiplexor Channel
2 15
P a 60
17 Elapsed Time Cluck
2 16
P a
64
18 Console Interrupt Request
217
P a 68
19
Paging Error
2 18
P a
72
20
Paging Queue
2 19
P a
76
21 Supervisor Call Instruction
2 20
P a 80
22 Privileged Operation
221
P a
84
23 Op-Code Trap
222
P 3 88
24 Address Error (Protect,
2 2a
P a
92
Addressing, Specification)
25 Data Error
224
P a
96
26 Exponent Overflow
2 25
P
a
100
27 Divide Error>
2 26
P a
104
28 Significant Error**
227
P
a
108
29 Exponent Underflow**>
2 28
P a
112
30 Decimal Overflow**
2 29
P a 116
31 Fixed Point Overflow** 2
ao
P a
120
32
Test Mode
2 31
P a
124
* 2 0
=
The rightmost bit in the Interrupt Flag register.
** Note: These interrupt conditions can be masked by two separate masks. The first,
the program mask, is a four-bit, non-privileged, program settable mask, that
22