Load And Test (Lter) (Ltdr) - RCA 70/46 Reference Manual

Load and Test
(LTER) (LTDR)
General Description
Format
(RR Short)
(RR Long)
Condition Code
Interrupt Action
Notes
Floating-Point Instructions
• The operand in the floating-point register specified by the second address
(R
2 )
is loaded into the floating-point register specified by the first address
(R
1 ) .
The sign and magnitude of the loaded operand determine the
condition code.
(LTER) 32 R1 R2
o
7 8 11 12 15
o
7 8 11 12 15
• 0 - result mantissa is zero.
1 - result mantissa is less than zero.
2 - result mantissa is greater than zero.
3 -not used.
• Address error:
Specification.
• 1.
If R1 and R2 are equal, the operation is equivalent to a test without
data movement.
2. The operand specified by the second address is unaltered.
3. Short operands do not alter the low-order half of the register specified
by the first address.
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