Processor State Registers; Program Counter - RCA 70/46 Reference Manual

PROCESSOR STATE
REGISTERS
Program Counter
Program Interrupt
• Registers are provided in scratch-pad memory, for each processor state
as given in table 3.
Table 3. Processor State Registers
State
Register
PI
P
2
P
3
P4
Program Counter 1 1 1 1
General Registers 16 16 6 5
Floating-Point Registers
4 * *
*
Interrupt Status Register 1 1 1 1
Interrupt Mask Register
1
1 1 1
*
Floating-point instructions executed in any of the processor states use the floating-
point registers assigned to Pl'
Because each processor state has its own general registers, Interrupt
Status Register and Interrupt Mask Register, storing and reloading these
registers is not necessary during interrupt processing.
• The Program Counter (P-counter) is a 32-bit register that is located
in scratch-pad memory. A separate P-counter is provided for each of the
four processor states.
The format of the P-counter is as follows:
Program Mask N ext Instruction Address
o
1 2
3 4
7 8
31
Bit Positions
0
and
1
contain the instruction length code. When an
interrupt occurs and is taken} or a Program Control instruction is exe-
cuted, the length of the last instruction executed in the terminated state,
before the interrupt condition occurred, is stored in bit positions 0 and 1
as given in table 4. The instruction length code is always generated from
the operation code of the instruction.
Table 4. Instruction Length Codes
ILC Length in Bytes
01 Two-byte instruction.
10
Four-byte instruction.
11 Six-byte instruction.
Notes:
1. If the interrupt condition is an operation code trap, the length of
the instruction causing the interrupt is generated from the opera-
tion code and is stored in bit positions 0 and
1
as given in table 6.
2. The instruction length code is unpredictable if the interrupt was
caused by one of the following:
Power Failure
Machine Check
Address Error (only
if
the address error was caused
by an invalid instruction address)
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