Channel Coordination - RCA 70/700 Series Reference Manual

Spectra 70 communication controller-multichannel (ccm) communication buffers
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Synchronous
OPeration
(Cont'd)
Channel Coordination
CCM
When transmitting synchronously, the CCM generates and transmits
seven SYN characters preceding the data. Once synchronization is estab-
lished, SYN is generated as necessary to maintain continous transmission
at the synchronous rate.
A given system may require the generation of a number of SYN char-
acters beyond the counting ability of the CCM. In this case the processor
program must generate SYN.
Synchronization is not presumed to be
established, in this type of operation, upon recognition of a specific number
of SYN characters, but only upon recognition of a discrete character which
indicates the end of the SYN sequence. This recognition is reported to the
program by the CCM for appropriate actio no Incoming SYN characters are
recognized by the CCM and deleted from the message.
When parallel buffers (bit-parallel data transfer to an from the com-
munications line) are used, the CCM operates synchronously to the extent
that no character framing elements are used. Special characteristics of
the remote device or the facility obviate the use of SYN characters to
establish or maintain synchronization. The result is that this line appears
always in sync so that no SYN characters need be generated by the remote
device and there is no SYN generation by the CCMo
The maintenance of orderly data flow is accomplished by the CCM by
use of the following tools:
1.
System Classification established by software and stored in the Line
Status Words. (See Section 3, table 3-3.)
20
Wired-in decoding lOgic which generates one of up to 64 discrete
CCM memory addresses (OWs) for each combination of inputs. Each
memory address permits access to expressions of further CCM
action.
Figure 1-2 identifies the inputs to this logic having par-
ticular significance to the programmer
0
During Read operations, the character to be decoded has been
assembled by the bit accumulator/distributor and modified as per
system classification as to shift status etc.
The parity is main-
tained with the same sense as received over the line o
During Write operations, the character at this point has the same bit
configuration as when received from the processor except with
USASCII, where the 2 8 bit will have beenpreset so that when the con-
version to extended ASCII to USASCII is subsequently performed, the
character will have correct line parityo
1-11

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