RCA 70/46 Reference Manual page 144

Add Halfword
(AH)
General Description
Format
(IX)
Condition Code
Intertupt Action
Notes
Fixed-Point
Instructions
• The halfword operand specified by the second address (XdB2/D2) is
added to the operand specified by the first address (R
1 )
and the sum is
placed into the register specified by the first address (R
1 ) .
The sign and
the magnitude of the sum determine the condition code setting.
o
7 8 11 12 15 16 19 20
31
• 0 - sum is zero.
1 - sum is less than zero.
2 - sum is greater than zero.
3-overflow
• Fixed-point overflow.
• Address error:
Addressing.
Specification.
• 1. The halfword in main memory specified by the second address is
expanded to full-word length prior
to
the addition by propagating
the sign bit value through the high-order 16 positions. The addition
is completed by adding all 32 bits of both operands.
2. An overflow exists if the high-order numeric result bit and the
carry out of the sign-bit position disagree. The sign is not corrected
after overflow occurs. A negative overflow results in a positive sum
and a positive overflow results in a negative sum with the overflow
bits being lost.
3. The operand specified by the second address is unaltered.
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