RCA 70/46 Reference Manual page 67

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Input/Output Operation
Block 6
A test is made t.o see if the specified device c.ontrol electr.onics is .oper-
able. The device contr.ol electr.onics has 50 microsec.onds t.o signal the
pr.ocess.or that it is .operable. If it does n.ot, the condition code is set
to
3,
the Test Device instructi.on is terminated and pr.ogram c.ontr.ol is trans-
ferred t.o the next instruction.
Block 7
If the specified device contr.ol electr.onics is .operable, it sends the stand-
ard device byte to the pr.ocess.or. This standard device byte is not stored in
the channel registers.
It
is used t.o set the proper c.onditi.on c.ode as f.oll.ows :
Condition Code
Meaning
3
Device control electronics is inoperable.
2
A termination interrupt pending condition exists in the device
control electronics on the mUltiplexor channel.
2
The device control electronics is busy working with the speci-
fied device.
2
The device control electronics is busy working with a device
other than the one specified.
1
An external device request interrupt pending condition exists
in the device control electronics on the multiplexor channel.
1
The specified device is busy but the device control electronics
is not busy (i.e., tape rewinding, off-line seek).
1
The specified device is inoperable.
0
The specified device and control electronics is available.
Block
8
A test is made
to
see if the c.onditi.on code is set t.o
1.
If it is, the
standard device byte is transferred t.o the channel registers f.or the channel
specified, the Test Device instructi.on is terminated and pr.ogram contr.ol
is transferred t.o the next instructi.on.
Block
9
If the c.onditi.on c.ode is n.ot set
to
1, the Test Device instructi.on is
terminated and c.ontr.ol is transferred t.o the next instructi.on.
Notes on Test Device Instruction:
1.
The channel status byte is n.ot st.ored as a result .of this .operati.on.
2. The standard device byte is n.ot st.ored if the c.onditi.on c.odes are
0, 2, .or 3.
3. The Channel Address Word (CAW), Channel Block Address (CBA)
and Channel C.ommand W.ord (CCW»
are n.ot used by this
instructi.on.
4. If executi.on .of this instructi.on causes the standard device byte t.o
be st.ored in the multiplex.or channel registers, the program must
inhibit interrupts fr.om the multiplex.or channel until the standard
device byte has been analyzed .or moved from the channel registers.
If interrupts are permitted and .one .occurs, the standard device
byte is destr.oyed.
58

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