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Maximum performance is achieved with D64 Multiplexed Block
Transfers (MBLT). The on-chip DMA channel should be used to move
large blocks of data to/from the VMEbus. The Universe should be able to
reach 50MB/second in 64-bit MBLT mode.
The MVME2300SC interfaces to the VMEbus via the P1 and P2
backplane connectors, which use three-row 96-pin connectors as specified
in the VMEbus standard. It also draws +5V, +12V, and –12V power from
the VMEbus backplane through these two connectors. 3.3V and 2.5V
supplies are regulated onboard from the +5 power.
Asynchronous Debug Port
A Texas Instruments TL16C550 Universal Asynchronous
Receiver/Transmitter (UART) provides the asynchronous debug port.
TTL-level signals for the port are routed through appropriate EIA-232-D
drivers and receivers to a DB9 connector on the front panel, and to the P2
backplane connector. The external signals are ESD protected.
This serial port can support 19.2 KBaud I/O. For detailed programming
information, refer to the MVME2300 Series VME Processor Module
Programmer's Reference Guide and to the vendor documentation for the
UART device.
PCI/ISA Bridge (PIB) Controller
The MVME2300SC uses a Winbond W83C553 PCI/ISA Bridge (PIB)
Controller to supply the interface between the PCI local bus and the ISA
system I/O bus (diagrammed in
The PIB controller provides the following functions:
4-15
PCI bus arbitration for:
– ISA (Industry Standard Architecture) bus DMA (not functional
on the MVME2300SC)
– The PHB (PCI Host Bridge) MPU/local bus interface function,
implemented by the Raven ASIC
– All on-board PCI devices
Figure
4-1).
General Description
4
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