Real-Time Clock/Nvram/Timer Function - Motorola MVME2300SC Series Installation And Use Manual

Functional Description
4

Real-Time Clock/NVRAM/Timer Function

4-16
– The PMC slot
ISA bus arbitration for DMA devices
ISA interrupt mapping for four PCI interrupts
Interrupt controller functionality to support 14 ISA interrupts
Edge/level control for ISA interrupts
Seven independently programmable DMA channels
One 16-bit timer
Three interval counters/timers
Accesses to the configuration space for the PIB controller are performed
by way of the CONADD and CONDAT (Configuration Address and Data)
registers in the Raven bridge controller ASIC. The registers are located at
offsets $CF8 and $CFC, respectively, from the PCI I/O base address.
The MVME2300SC employs an SGS-Thomson surface-mount M48T559
RAM and clock chip to provide 8KB of non-volatile static RAM, a real-
time clock, and a watchdog timer function. This chip supplies a clock,
oscillator, crystal, power failure detection, memory write protection, 8KB
of NVRAM, and a battery in a package consisting of two parts:
A 28-pin 330mil SO device containing the real-time clock, the
oscillator, power failure detection circuitry, timer logic, 8KB of
static RAM, and gold-plated sockets for a battery
A SNAPHAT battery housing a crystal along with the battery
The SNAPHAT battery package is mounted on top of the M48T559
device. The battery housing is keyed to prevent reverse insertion.
The clock furnishes seconds, minutes, hours, day, date, month, and year in
BCD 24-hour format. Corrections for 28-, 29- (leap year), and 30-day
months are made automatically. The clock generates no interrupts.
Although the M48T559 is an 8-bit device, 8-, 16-, and 32-bit accesses from
the ISA bus to the M48T559 are supported. Refer to the MVME2300 Series
Computer Group Literature Center Web Site