Features; Description - Microsemi SmartFusion2 Demo Manual

In-Application Programming Using PCIe Interface
2.2.1

Features

The demo design performs the following types of programming based on the input provided by the
programming file:
• eNVM programming: The IAP programming service programs only eNVM. In this case, the input
programming file has only eNVM content.
• FPGA Fabric programming: The IAP programming service programs only the FPGA fabric. In this
case, the input programming file has only the FPGA fabric content.
• eNVM and FPGA Fabric programming: The IAP programming service programs both the FPGA
fabric and eNVM. In this case, the input programming file has both the FPGA fabric and eNVM
content.
2.2.2

Description

IAP in SmartFusion2 devices is a two-step process as follows:
Step1: Loading SPI Flash with Programming Bitstream
The Cortex-M3 processor receives bitstream data in blocks of 2 KB from the host PC through the PCIe
interface, and stores the bitstream data in the LSRAM 2 KB temporary buffer. The Cortex-M3 processor
reads the bitstream data stored in the LSRAM temporary buffer and writes to the external SPI Flash
attached to the microcontroller subsystem (MSS) SPI_0 controller. The Cortex-M3 processor continues
to receive blocks of 2 KB bitstream data through the PCIe interface until the entire programming file gets
transferred from the host PC to the external SPI Flash.
Step 2: Initiating the IAP Service
The bitstream data is verified by requesting the AUTHENTICATE IAP service from the system controller.
The system controller reads the bitstream data from the external SPI Flash using the SPI interface to
check the data integrity of the bitstream data. During authentication, the rest of the device functions
normally. On successful authentication, the Cortex-M3 processor initiates a PROGRAM IAP system
controller system service. The system controller fetches the bitstream data from the SPI Flash and
programs the flash components of the SmartFusion2 device. IAP can be used to program the FPGA
fabric, eNVM, or both FPGA fabric and eNVM.
The Cortex-M3 processor in the SmartFusion2 device can execute an application image from embedded
SRAM (eSRAM), eNVM or DDR/SDR memories. For more information about remapping techniques, see
AC390: SmartFusion2 SoC FPGA Remapping eNVM, eSRAM, and DDR/SDR SDRAM Memories
Application Note. In this demo design, the Cortex-M3 processor executes the IAP application image from
eSRAM while the eNVM programming takes place, that is, during the Program operation mode. To
execute the application image from eSRAM, the Cortex-M3 processor copies the IAP application image
that resides in eNVM data client to eSRAM and remaps the eSRAM to the Cortex-M3 processor code
region. For the Verify and Authenticate operation modes, the application image can be executed from
either eNVM or eSRAM as the eNVM programming does not take place.
The system controller executes the IAP programming service in the following modes:
• Authenticate: The system controller IAP service validates the integrity of the programming
bitstream.
• For security and reliability reasons, Microsemi recommends that the bitstream must be
authenticated before the program is executed, using the Authenticate Operation mode. The
SmartFusion2 device application must commit the bitstream for programming, only after
successful authentication and validation of the integrity of the bitstream.
• Program: Depending on the programming bitstream, system controller IAP service programs the
following:
• eNVM
• FPGA fabric
• Both eNVM and FPGA fabric
• Verify: The system controller IAP service verifies the contents of the SmartFusion2 device against
the programming bitstream data stored in the SPI Flash.
Note: The FPGA fabric is not operational during Program or Verify operations as the device enters into
Flash*Freeze (F*F) mode. During Program or Verify operations, the PCIe communication link is in reset
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