Known Issue; Figure 28 Iap Verification Error Message - Microsemi SmartFusion2 Demo Manual

Soc fpga in-application programming using pcie interface - libero soc v11.8
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In-Application Programming Using PCIe Interface
The verification operation is successful when the SmartFusion2 device contents match the programming
bitstream data stored in the SPI Flash. If the verification fails, the GUI displays an error message with an
error code. For information about error codes, refer to the
The sample programming files are at– <download_folder>\sf2_iap_using_interface_demo_df\
sample_programming_files.
All the files do not pass the verification. Only the pcie_iap_top.spi file passes the verification
operation as it matches the SmartFusion2 device contents (pcie_iap_top.stp). The other
programming files fail verification.
The following figure shows the verification error message.
Figure 28 • IAP Verification Error Message
2.10

Known Issue

After successful completion of the two-step IAP or CM3 ISP, LSRAM read and write access fails from the
fabric path. This is a known silicon issue, which is documented in the
Errata. The workaround for this problem is to reset the system after the IAP or ISP program operation.
Microsemi recommends that this workaround is implemented for any design, which accesses LSRAM
after IAP or ISP. For more information about how to implement this workaround, see
Implementing Workaround to Access Fabric LSRAM after IAP/ISP Program Operation,
The design example provided in this demonstration implements the workaround for accessing LSRAM
after implementing the IAP or ISP program operation in the Libero software. The design files are
available in the following location:
<download_folder>\sf2_iap_using_interface_demo_df\sample_programming_files\LSRAM_Workaround
\PCIE_IAP_Tamper.rar
DG0584 Demo Guide Revision 5.0
Appendix: Error Codes,
page 24.
ER0196: SmartFusion2 Device,
Appendix:
page 31.
22

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