Figure 37 Softconsole Project Workspace - Microsemi SmartFusion2 Demo Manual

Soc fpga in-application programming using pcie interface - libero soc v11.8

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Appendix: Hardware Implementation

For software modifications, open the SoftConsole project workspace (located at

<download_folder>\sf2_iap_using_interface_demo_df\libero\PCIE_IAP\SoftConsole4.0) using

SoftConsole IDE v4.0. The following figure shows the SoftConsole project workspace.

Figure 37 • SoftConsole Project Workspace

The SoftConsole workspace consists the following projects:

•

PCIE_IAP_MSS_CM3_IAP_APP:

Receives the bitstream from the host PC through the PCIe interface and invokes the system

controller programming services.

•

PCIE_IAP_MSS_CM3_boot_loader:

Implements remapping of eSRAM to the Cortex-M3 processor code space after copying the IAP

code from eNVM to eSARM.

•

Both the projects contain all the firmware and hardware abstraction layers of the hardware design.

DG0584 Demo Guide Revision 5.0

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