Figure 42 Two-Port Sram Configurator Window; Figure 43 Dev_Restart_After_Iap_Blk Smartdesign - Microsemi SmartFusion2 Demo Manual

Soc fpga in-application programming using pcie interface - libero soc v11.8

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Appendix: Implementing Workaround to Access Fabric LSRAM after IAP/ISP Program

Operation

Figure 42 • Two-Port SRAM Configurator Window

Connect Tamper Macro, FSM, and TPSRAM, as shown in the following figure.

Figure 43 • Dev_Restart_after_IAP_blk SmartDesign

Click the PCIE_IAP_top tab and drag the Dev_Restart_after_IAP_blk component from the Design

Hierarchy to the PCIE_IAP_top SmartDesign canvas.

DG0584 Demo Guide Revision 5.0

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