Samsung KS57C2308 Manual page 304

KS57P2308/P2316 OTP
1.0475 MHz
1.00 MHz
15.6 kHz
(T = – 40 C to + 85 C)
A
Parameter
Data retention supply voltage
Data retention supply current
Release signal set time
Oscillator stabilization wait
(1)
time
NOTES:
1. During oscillator stabilization wait time, all CPU operations must be stopped to avoid instability during oscillator
start-up.
2. Use the basic timer mode register (BMOD) interval timer to delay execution of CPU instructions during the wait time.
16-10
CPU Clock
1.5 MHz
750 kHz
500 kHz
250 kHz
1 1.8
CPU CLOCK = 1/n x oscillator frequency (n = 4, 8, 64)
Figure 16-2. Standard Operating Voltage Range
Table 16-10. RAM Data Retention Supply Voltage in Stop Mode
Symbol
V
Normal operation
DDDR
I V
DDDR
t
Normal operation
SREL
t
Released by
WAIT
Released by interrupt
3 4 5
Supply Voltage (V)
Conditions
= 1.8 V
DDDR
RESET
KS57C2308/P2308/C2316/P2316
Main OSC. Frequency
6 MHz
4.19 MHz
3 MHz
6 7
Min Typ Max
1.8 – 6.5
– 0.1
0 –
17
–
2 /fx
– (2)
Unit
V
10 µA
– µs
– ms
–