Samsung KS57C2308 Manual page 208

Single-chip cmos microcontroller
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RESET
HARDWARE REGISTER VALUES AFTER
Table 9-1 gives you detailed information about hardware register values after a
mode or during normal operation.
Hardware Component
or Subcomponent
Program counter (PC)
Program Status Word (PSW):
Carry flag (C)
Skip flag (SC0–SC2)
Interrupt status flags (IS0, IS1)
Bank enable flags (EMB, ERB)
Stack pointer (SP)
Data Memory (RAM):
Working registers E, A, L, H, X, W, Z, Y
Bank selection registers (SMB, SRB)
BSC register (BSC0–BSC3)
Clocks:
Power control register (PCON)
Clock output mode register (CLMOD)
System clock control reg (SCMOD)
Interrupts:
Interrupt request flags (IRQx)
Interrupt enable flags (IEx)
Interrupt priority flag (IPR)
Interrupt master enable flag (IME)
INT0 mode register (IMOD0)
INT1 mode register (IMOD1)
INT2 mode register (IMOD2)
9-2
RESET
Table 9-1. Hardware Register Values After
If
RESET
Power-Down Mode
Lower five bits of address 0000H
are transferred to PC12/13–8,
and the contents of 0001H to
PC7–0.
Bit 6 of address 0000H in
program memory is transferred to
the ERB flag, and bit 7 of the
address to the EMB flag.
Values retained
RESET
Occurs During
Retained
0
0
Undefined
0, 0
0
0
0
0
0
0
0
0
0
0
0
KS57C2308/P2308/C2316/P2316
occurs during power-down
RESET
If
Occurs During
RESET
Normal Operation
Lower five bits of address 0000H
are transferred to PC12/13–8,
and the contents of 0001H to
PC7–0.
Undefined
0
0
Bit 6 of address 0000H in
program memory is transferred to
the ERB flag, and bit 7 of the
address to the EMB flag.
Undefined
Undefined
0, 0
0
0
0
0
0
0
0
0
0
0
0

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