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MEMORY MAP
TMOD0
— Timer/Counter 0 Mode Register
Bit
Identifier
Value
RESET
Read/Write
Bit Addressing
.7
.6–.4
.3
.2
.1–.0
4-28
7
6
"0"
.6
0
0
W
W
8
8
Bit 7
0
Always logic zero
Timer/Counter 0 Input Clock Selection Bits
0
0
0
External clock input at TCL0 pin on rising edge
0
0
1
External clock input at TCL0 pin on falling edge
10
1
0
0
fxx/2
8
1
0
1
fxx/2
6
1
1
0
fxx/2
4
1
1
1
fxx/2
NOTE: "fxx" = Selected system clock of 4.19 MHz
Clear Counter and Resume Counting Control Bit
1
Clear TCNT0, IRQT0, and TOL0 and resume counting immediately
(This bit is cleared automatically when counting starts.)
Enable/Disable Timer/Counter 0 Bit
0
Disable timer/counter 0; retain TCNT0 contents
1
Enable timer/counter 0
Bit 1–0
0
Always logic zero
5
4
.5
.4
0
0
W
W
8
8
(4.09 kHz)
(16.4 kHz)
(65.5 kHz)
(262 kHz)
KS57C2308/P2308/C2316/P2316
3
2
.3
.2
"0"
0
0
W
W
W
1/8
8
F91H, F90H
1
0
"0"
0
0
W
8
8
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