Samsung KS57C2308 Manual page 225

KS57C2308/P2308/C2316/P2316
Register Type
Name
BMOD Control
BCNT Counter
WDMOD Control
WDTCF Control
NOTE: "U" means that the value is undetermined after a
Bits
BMOD.3
Instruction
BMOD.2
4
BMOD.1
BMOD.0
WDMOD
Table 11-1. Basic Timer Register Overview
Description
Controls the clock frequency
(mode) of the basic timer; also, the
oscillation stabilization interval after
power-down mode release or
Counts clock pulses matching the
BMOD frequency setting
Controls watchdog timer operation.
Clear the watchdog timer's counter.
Clock
Selector
Clock Input
1 pulse period = BT input clock 2 (1/2 duty)
3-Bit Counter
WDTCNT
8
WAIT
RESET
Figure 11-1. Basic Timer Circuit Diagram
Size
4-bit
RESET
8-bit
8-bit
1-bit
.
RESET
"Clear" Signal
Clear
BCNT
Overflow
BCNT
8
8
Overflow
C
WDTCF DELAY
Clear
Stop
Bits
NOTE: WAIT means stabilization time
Instruction
TIMERS and TIMER/COUNTERS
RAM Addressing
Address Mode
F85H 4-bit write-only;
BMOD.3: 1-bit
write-only
F86H–F87H 8-bit read-
only
F98H–F99H 8-bit write-only
F9AH.3 1-bit write-only
Clear
IRQB
IRQB
Bit5
CPU Clock Start Signals
(By Interrupts)
RESET
(By )
Reset
RESET
Generation
RESET
after or Stabilization
time after STOP mode release.
Reset
Value
"0"
"U"
(note)
A5H
"0"
Interrupt
Request
1-Bit R/W
11-3