Samsung KS57C2308 Manual page 11

Single-chip cmos microcontroller
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KS57C2308/P2308/C2316/P2316
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PROGRAMMING TIP — Defining Vectored Interrupts
The following examples show you several ways you can define the vectored interrupt and instruction reference
areas in program memory:
1. When all vector interrupts are used:
ORG
VENT0
VENT1
VENT2
VENT3
VENT4
VENT5
2. When a specific vectored interrupt such as INT0, and INTT0 is not used, the unused vector interrupt
locations must be skipped with the assembly instruction ORG so that jumps will address the correct locations:
ORG
VENT0
VENT1
ORG
VENT3
VENT4
ORG
ORG
3. If an INT0 interrupt is not used and if its corresponding vector interrupt area is not fully utilized, or if it is not
written by a ORG instruction in Example 2, a CPU malfunction will occur:
ORG
VENT0
VENT1
VENT3
VENT4
VENT5
ORG
General-purpose ROM area
In this example, when an INTS interrupt is generated, the corresponding vector area is not VENT4 INTS, but
VENT5 INTT0. This causes an INTS interrupt to jump incorrectly to the INTT0 address and causes a CPU
malfunction to occur.
0000H
1,0,RESET
; EMB
0,0,INTB
; EMB
0,0,INT0
; EMB
0,0,INT1
; EMB
0,0,INTS
; EMB
0,0,INTT0
; EMB
0000H
1,0,RESET
; EMB
0,0,INTB
; EMB
0006H
; INT0 interrupt not used
0,0,INT1
; EMB
0,0,INTS
; EMB
000CH
; INTT0 interrupt not used
0010H
0000H
1,0,RESET
; EMB
0,0,INTB
; EMB
0,0,INT1
; EMB
0,0,INTS
; EMB
0,0,INTT0
; EMB
0010H
1, ERB
0; Jump to RESET address by
0, ERB
0; Jump to INTB address by INTB
0, ERB
0; Jump to INT0 address by INT0
0, ERB
0; Jump to INT1 address by INT1
0, ERB
0; Jump to INTS address by INTS
0, ERB
0; Jump to INTT0 address by INTT0
1, ERB
0; Jump to RESET address by
0, ERB
0; Jump to INTB address by INTB
0, ERB
0; Jump to INT1 address by INT1
0, ERB
0; Jump to INTS address by INTS
1, ERB
0; Jump to RESET address by
0, ERB
0; Jump to INTB address by INTB
0, ERB
0; Jump to INT1 address by INT0
0, ERB
0; Jump to INTS address by INT1
0, ERB
0; Jump to INTT0 address by INTS
ADDRESS SPACES
RESET
RESET
RESET
2-3

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