Samsung KS57C2308 Manual page 303

KS57C2308/P2308/C2316/P2316
(T = – 40 C to + 85 C, V
A
Parameter
Instruction cycle
(1)
time
TCL0 input
frequency
t
TCL0 input high,
low width
cycle time
SCK
high, low
SCK
width
SI setup time to
high
SCK
SI hold time to
high
SCK
Output delay for
to SO
SCK
Interrupt input
high, low width
Input Low
RESET
Width
NOTES:
1. Unless otherwise specified, Instruction Cycle Time condition values assume a main system clock (fx) source.
2. Minimum value for INT0 is based on a clock of 2t
Table 16-9. A.C. Electrical Characteristics
= 1.8 V to 5.5 V)
DD
Symbol Conditions
t V = 2.7 V to 5.5 V
CY DD
V = 1.8 V to 4.5 V
DD
With subsystem clock (fxt)
f V = 2.7 V to 5.5 V
TI0 DD
V = 1.8 V to 5.5V
DD
, t V = 2.7 V to 5.5 V
TIH0 TIL0 DD
V = 1.8 V to 5.5 V
DD
t V = 2.7 V to 5.5 V
KCY DD
External
SCK
Internal
SCK
V = 1.8 V to 5.5 V
DD
External
SCK
Internal
SCK
t , t V = 1.8 V to 5.5 V
KH KL DD
External
SCK
Internal
SCK
V = 1.8 V to 5.5 V
DD
External
SCK
Internal
SCK
t
External
SCK
SIK
Internal
SCK
t
External
SCK
KSI
Internal
SCK
t V = 2.7 V to 5.5 V
KSO
DD
External
SCK
Internal
SCK
V = 1.8 V to 5.5 V
DD
External
SCK
Internal
SCK
t ,
INT0
INTH
t
INTL
INT1, INT2, INT4, KS0–KS7
t
Input
RSL
source
source
3200
source
source 3800
source
t
source
KCY
1600
source
source
t
KCY
source
source
source
source
source
source
source
source
or 128/fx as assigned by the IMOD0 register setting.
CY
KS57P2308/P2316 OTP
Min Typ
0.67 –
0.95 –
114 122
0 –
0.48 –
1.8
800 –
650
400 –
/2 – 50
/
2 – 150
100 –
150
400 –
400
– –
(2)
–
10
10 –
Max Units
64 µs
64
125
1.5 MHz
1 MHz
– µs
– ns
– ns
– ns
– ns
300 ns
250
1000
1000
– µs
– µs
16-9