KS57C2308/P2308/C2316/P2316
SEGMENT (SEG) SIGNALS
The 32 LCD segment signal pins are connected to corresponding display RAM locations at 1E0H–1FFH. Bits 0–3
of the display RAM are synchronized with the common signal output pins COM0, COM1, COM2, and COM3.
When the bit value of a display RAM location is "1", a select signal is sent to the corresponding segment pin.
When the display bit is "0", a "no-select" signal is sent to the corresponding segment pin. Each bias has select
and no-select signals.
Table 12-7. Select/No-Select Signals for LCD Static Display Mode
COM
Figure 12-8. Select/No-select Bias Signals in Static Display Mode
V
/V
SS
LC0
SELECT
COM
SEG
T: LCDCK
SEG
Select
V
LC0
–V
LC0
NO-SELECT
T
T
LCD CONTROLLER/DRIVER
/V
SS
/ + V
LC0
V
LC0
V
SS
V
LC0
V
SS
No-select
V
/V
SS
LC0
0 V/ 0 V
12-11