Samsung KS57C2308 Manual page 194

INTERRUPTS
EXTERNAL INTERRUPT 2 MODE REGISTER (IMOD2)
The mode register for external interrupt 2 at the KS0–KS7 pins, IMOD2, is addressable only by 4-bit write
instructions. clears all IMOD2 bits to logic zero.
RESET
FB6H "0"
If a rising or falling edge is detected at any one of the selected KS pin by the IMOD2 register, the IRQ2 flag is set
to logic one and a release signal for power-down mode is generated.
IMOD2 0
7-10
IMOD2.2 IMOD2.1
Table 7-6. IMOD2 Register Bit Settings
IMOD2.2 IMOD2.1
0 0
0 0
0 1
0 1
1 x
IMOD2.0
IMOD2.0
0 Select rising edge at INT2 pin
1 Select falling edge at KS4–KS7
0 Select falling edge at KS2–KS7
1 Select falling edge at KS0–KS7
x Ignore selection of falling edge at KS4–KS7
KS57C2308/P2308/C2316/P2316
Effect of IMOD2 Settings