Samsung KS57C2308 Manual page 102

Single-chip cmos microcontroller
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SAM47 INSTRUCTION SET
AND
— Logical And
AND
dst,src
Operation:
Operand
A,#im
A,@HL
EA,RR
RRb,EA
Description:
The source operand is logically ANDed with the destination operand. The result is stored in the
destination. The logical AND operation results in "1" whenever the corresponding bits in the two
operands are both "1"; otherwise a "0" bit is stored. The contents of the source are unaffected.
Operand
A,#im
A,@HL
EA,RR
RRb,EA
Example:
If the extended accumulator contains the value 0C3H (11000011B) and register pair HL the value
55H (01010101B), the instruction
AND
leaves the value 41H (01000001B) in the extended accumulator EA .
5-28
Operation Summary
Logical-AND A immediate data to A
Logical-AND A indirect data memory to A
Logical-AND register pair (RR) to EA
Logical-AND EA to register pair (RRb)
Binary Code
1
1
0
0
0
0
0
0
1
1
1
0
0
0
0
1
1
0
0
0
0
EA,HL
1
1
1
0
1
1
d3
d2
d1
d0
1
1
0
0
1
1
1
1
0
0
1
1
r2
r1
0
1
1
1
0
0
1
0
r2
r1
0
KS57C2308/P2308/C2316/P2316
Bytes
2
1
2
2
Operation Notation
A
A AND im
A
A AND (HL)
EA
EA AND RR
RRb
RRb AND EA
Cycles
2
1
2
2

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