Samsung KS57C2308 Manual page 136

SAM47 INSTRUCTION SET
LD
— Load
LD (Continued)
Examples: 2. If an instruction such as LD A,#im (LD EA,#imm) or LD HL,#imm is written more than two
times in succession, only the first LD is executed; the next instructions are treated as NOPs.
Here are two examples of this "redundancy effect":
LD
LD
LD
LD
LD
LD
LD
LD
LD
The following table contains descriptions of special characteristics of the LD instruction when
used in different addressing modes:
Instruction
LD A,#im
LD A,@RRa Load the data memory contents pointed to by 8-bit RRa register pairs
LD A,DA
LD A,Ra
LD Ra,#im
LD
RR,#imm
LD DA,A
LD Ra,A
5-62
A,#1H
EA,#2H
A,#3H
23H,A
HL,#10H
HL,#20H
A,#3H
EA,#35
@HL,A
Since the "redundancy effect" occurs with instructions like LD EA,#imm, if
this instruction is used consecutively, the second and additional instructions
of the same type will be treated like NOPs.
(HL, WX, WL) to the A register.
Load direct data memory contents to the A register.
Load 4-bit register Ra (E, L, H, X, W, Z, Y) to the A register.
Load 4-bit immediate data into the Ra register (E, L, H, X, W, Y, Z).
Load 8-bit immediate data into the Ra register (EA, HL, WX, YZ). There is a
redundancy effect if the operation addresses the HL or EA registers.
Load contents of register A to direct data memory address.
Load contents of register A to 4-bit Ra register (E, L, H, X, W, Z, Y).
; A 1H
; NOP
; NOP
; (23H) 1H
; HL 10H
; NOP
; A 3H
; NOP
; (10H) 3H
Operation Description and Guidelines
KS57C2308/P2308/C2316/P2316