Brownout Detection; Reset; Changing Power Modes - Analog Devices ADE9000 Technical Reference Manual

UG-1098

BROWNOUT DETECTION

Power-on reset (POR) circuits monitor the VDD, AVDD, and
DVDD supplies. If AVDD or DVDD drops below 1.3 V to 1.5 V, or
VDD drops below 2.4 V to 2.6 V, the IC is held in reset and the
power-on sequence begins again, waiting until AVDD and DVDD
are above 1.3 V to 1.5 V and VDD is above 2.4 V to 2.6 V before
starting the 20 ms POR timer. A RSTDONE interrupt on IRQ1
indicates when the ADE9000

RESET

If the RESET pin goes low for 1 µs or the SWRST bit is set in the
CONFIG1 register to initiate a software reset, the AVDD and
DVDD LDOs are turned off. The power-on sequence resumes
from the point where the AVDD and DVDD LDOs are turned on
(see the Power-On Sequence section for details). For applications
can be reinitialized via the SPI.
ADE9000 Technical Reference Manual
that require putting the
it is recommended to use PSM3, which consumes roughly 2 µA,
instead of holding the IC in reset with the RESET pin low, which
consumes 100 µA (see the data sheet for the exact current
consumption).

CHANGING POWER MODES

The state of the PM1 and PM0 pins is continuously monitored.
If the power mode changes from PSM0 to PSM3 (PM1 and
PM0 = 11) for 1 µs, the AVDD and DVDD LDOs are turned off.
When the power mode switches back to PSM0, the power-on
sequence resumes from the point where the AVDD and DVDD
LDOs are turned on.
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ADE9000 into a low power reset state,