Analog Devices ADE9000 Technical Reference Manual page 11

ADE9000 Technical Reference Manual
Digital Integrator
A digital integrator is included to allow easy interfacing to di/dt
current sensors, also known as Rogowski coils. The di/dt sensor
output increases by 20 dB/decade over the frequency range.
To compensate for this increase, the digital integrator applies
−20 dB/decade gain with a phase shift of approximately −90°.
A second-order antialiasing filter is required to avoid noise
aliasing back in the band of interest when the ADC is sampling.
To enable the digital integrator on the IA, IB, and IC channels,
set the INTEN bit in the CONFIG0 register. To enable the
digital integrator on the neutral current, IN channel, set the
ININTEN bit in the CONFIG0 register.
Figure 11 and Figure 12 show the magnitude and phase
response of the ADE9000 digital integrator with the default
DICOEFF = 0xFFFFE000.
100
50
0
–50
–100
–150
–2 –1 0
10 10 10
FREQUENCY (Hz)
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
0 500 1000 1500
FREQUENCY (Hz)
Figure 11. Digital Integrator Magnitude and Phase Response with
DICOEFF = 0xFFFFE000
4
2
0
–2
–4
–6
35 40 45 50 55
FREQUENCY (Hz)
–89.94
–89.86
–89.88
–89.90
–89.92
–89.94
35 40 45 50 55
FREQUENCY (Hz)
Figure 12. Digital Integrator Magnitude and Phase Response from
40 Hz to 80 Hz with DICOEFF = 0xFFFFE000
If the integrator is enabled, set DICOEFF = 0xFFFFE000.
Phase Compensation
The ADE9000 phase compensation uses a digital filter to
achieve a phase adjustment of ±0.001°. This high resolution
improves the total active energy and reactive energy
performance at low power factors.
The phase calibration range is −15° to +2.25° at 50 Hz.
1 2 3
10 10 10
2000 2500 3000 3500 4000
60 65 70 75 80 85
60 65 70 75 80 85
To achieve this calibration range, the voltage channel is delayed
by one 8 ksps sample, 2.25° at 50 Hz:
Voltage Channel
Voltage Channel
The current channel is then delayed by a digital filter, according
to the value programmed into the xPHCALx register. The
resulting phase correction depends on the value in the
xPHCALx register. The following equation provides the phase
correction between the input current and voltage after the
combined voltage and current delays. In this formula,
PhaseCorrection° is positive to correct a current that lags the
voltage, and PhaseCorrection° is negative to correct a situation
where the current leads the voltage, such as occurs with a
current transformer:
Phase Correction
where ω = 2 × π × f
The xPHCALx register value can be calculated from the desired
phase correction according to this equation:
xPHCALx
For example, if f
the voltage by 0.1 degrees, Phase Correction° = −0.1°. Write
xPHCALx = 0xFFD3_7760 to correct for this.
90
ω = 2 × π × 50/8000 = 0.03927
=
xPHCALx
=
90
CURRENT
TRANSFORMER
SENSOR:
CURRENT LEADS
VOLTAGE
I LEADS V BY UP TO 15°
PHASE COMPENSATION = –15°
Figure 13. Phase Compensation Example for Current Transformer,
Rev. 0 | Page 11 of 86

f

° = LINE ×
Delay 360

f

DSP
50

° = ×
Delay 360


8000

−

° =
arctan

xPHCALx


−
xPHCALx

−
arctan

+
1 xPHCALx

/f .
LINE DSP
 
ϕ − +
sin( ω ) sin ω
 
= × 27
2
 
× − ϕ
sin( 2 ω )
 
= 50 Hz, f = 8 kHz, and the current leads
LINE DSP

− −
sin( RADIANS ( 0 ) 1 . . 0 03927


× −
sin( 2 . 0 03927 RADIANS

− =
2918553 0 xFFD 3 _ 7767
INPUT
VOLTAGE
INPUT
OUTPUT
CURRENT
VOLTAGE
OUTPUT
CURRENT
DELAY I
BY UP TO
17.25°
DELAY V BY
ONE SAMPLE
2.25° AT 50Hz
where the Current Leads the Voltage
UG-1098


°



° = °
. 2 25



sin ω


−
× 27 +
2 cos ω

−
27 
× ×
2 sin ω


−
× 27 +
2 cos ω


+
) sin . 0 03927

27
×
2

−
( 0 1 . ))

ADE9000