Lattice Semiconductor 10 Gb+ Ethernet MAC IP User Manual page 5

Lattice Semiconductor
• Transmit and receive statistics vector
• Optional statistics counters of length from 16 to 40 bits for all devices (statistic counters are external to the core)
• Programmable Inter Frame Gap
• Supports:
– Full duplex operation
– Flow control using PAUSE frames
– VLAN tagged frames
– Automatic padding of short frames
– Optional FCS generation during transmission
– Optional FCS stripping during reception
– Jumbo frames up to 16k
– Inter frame Stretch Mode during transmission
– Deficit Idle Count
Data rates up to 12Gbps are supported by increasing the 10 Gb+ Ethernet MAC system clock rate from the stan-
dard frequency of 156.25MHz used for processing 10Gbps data up to frequencies as high as 187.50MHz.
IPUG39_02.9, December 2010 5 10 Gb+ Ethernet MAC IP Core User's Guide
Introduction