Kbytes Rom Read Cycle - LSI LSI53C895A Technical Manual

≤= 64 Kbytes ROM Read Cycle
Table 6.38
Symbol Parameter
t Address setup to MAS/ HIGH
11
t Address hold from MAS/ HIGH
12
t MAS/ pulse width
13
t MCE/ LOW to data clocked in
14
t Address valid to data clocked in
15
t MOE/ LOW to data clocked in
16
t Data hold from address, MOE/, MCE/ change
17
t Address out from MOE/, MCE/ HIGH
18
t Data setup to CLK HIGH
19
Figure 6.33 ≤ 64 Kbytes ROM Read Cycle
CLK
MAD
(Address driven by LSI53C895A;
Data driven by Memory)
MAS1/
(Driven by LSI53C895A)
MAS0/
(Driven by LSI53C895A)
MCE/
(Driven by LSI53C895A)
MOE/
(Driven by LSI53C895A)
MWE/
(Driven by LSI53C895A)
6-54
Higher Lower
Address Address
t
11
t
13
Electrical Specifications
t
12
t
15
Min Max
25 –
15 –
25 –
150 –
205 –
100 –
0 –
50 –
5 –
Valid
Read
Data
t
19
t
t
14
18
t
16
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
17