LSI LSI53C1030 Manuals

Manuals and User Guides for LSI LSI53C1030. We have 1 LSI LSI53C1030 manual available for free PDF download: Technical Manual

LSI LSI53C1030 Technical Manual

LSI LSI53C1030 Technical Manual (170 pages)

PCI-X to Dual Channel Ultra320 SCSI Multifunctio Controller

Brand: LSI | Category: Controller | Size: 2.64 MB

Table of Contents

Table of Contents
7
Chapter 1 Introduction

17
- General Description
  17
  - Typical LSI53C1030 Board Application
    19
  - Typical LSI53C1030 System Application
    20
- Benefits of the Fusion-MPT Architecture
  21
- Benefits of PCI-X
  22
- Benefits of Ultra320 SCSI
  22
- Benefits of Surelink (Ultra320 SCSI Domain Validation)
  23
- Benefits of Lvdlink Technology
  24
- Benefits of Tolerant ® Technology
  24
- Summary of LSI53C1030 Features
  25
  - SCSI Performance
    25
  - PCI Performance
    26
  - Integration
    27
  - Flexibility
    27
  - Reliability
    28
  - Testability
    28
Chapter 2 Functional Description

29
- Block Diagram Description
  30
- Fusion-MPT Architecture Overview
  34
- PCI Functional Description
  35
  - PCI Addressing
    36
  - PCI Commands and Functions
    37
  - PCI/PCI-X Bus Commands and Encodings
    37
  - PCI Arbitration
    43
  - PCI Cache Mode
    43
  - PCI Interrupts
    43
  - Power Management
    44
  - Power States
    44
- Ultra320 SCSI Functional Description
  46
  - Ultra320 SCSI Features
    46
  - Paced Transfer Example
    48
  - Example of Precompensation
    49
  - SCSI Bus Interface
    51
- External Memory Interface
  52
  - Flash ROM Interface
    52
  - Flash ROM Size Programming
    52
  - Flash ROM Block Diagram
    53
  - NVSRAM Interface
    54
  - Flash Signature Value
    54
- Serial EEPROM Interface
  55
  - NVSRAM Diagram
    55
- Zero Channel RAID
  56
  - PCI Configuration Record in Serial EEPROM
    56
  - ZCR Circuit Diagram for LSI53C1030 and LSI53C1010R
    57
- Multi-ICE Test Interface
  58
  - 20-Pin Multi-ICE Header Pinout
    58
Chapter 3 Signal Description

59
- Signal Organization
  60
  - LSI53C1030 Functional Signal Grouping
    61
- PCI Bus Interface Signals
  62
  - PCI System Signals
    62
  - PCI Address and Data Signals
    63
  - PCI Interface Control Signals
    64
  - PCI Arbitration Signals
    65
  - PCI Error Reporting Signals
    65
  - PCI Interrupt Signals
    66
- PCI-Related Signals
  67
- SCSI Interface Signals
  68
- Memory Interface
  72
  - SCSI Channel [1] Control Signals
    72
  - Flash ROM/NVSRAM Interface Pins
    72
- Zero Channel RAID Interface
  74
  - Serial EEPROM Interface Pins
    74
  - ZCR Configuration Pins
    74
- Test Interface
  75
  - JTAG, ICE, and Debug Pins
    75
  - Tracesync
    75
  - LSI Logic Test Pins
    76
- GPIO and LED Signals
  77
- Power and Ground Pins
  78
- Power-On Sense Pins Description
  79
- Internal Pull-Ups and Pull-Downs
  83
  - Pull-Up and Pull-Down Conditions
    83
Chapter 4 PCI Host Register Description

85
- PCI Configuration Space Register Description
  85
- PCI I/O Space and Memory Space Register Description
  113
  - PCI I/O Space Address Map
    114
  - PCI Memory [0] Address Map
    114
  - PCI Memory [1] Address Map
    114
  - Interrupt Signal Routing
    121
Chapter 5 Specifications

123
- DC Characteristics
  123
- Tolerant Technology Electrical Characteristics
  129
  - Tolerant Technology Electrical Characteristics for SE SCSI Signals
    129
  - Rise and Fall Time Test Condition
    130
- AC Characteristics
  131
  - SCSI Input Filtering
    131
  - Reset Input
    132
  - Interrupt Output
    132
- External Memory Timing Diagrams
  133
  - NVSRAM Timing
    134
  - NVSRAM Read Cycle Timing
    134
  - NVSRAM Read Cycle
    135
  - NVSRAM Read Cycle (Cont.)
    135
  - NVSRAM Write Cycle
    136
  - NVSRAM Write Cycle
    137
  - NVSRAM Write Cycle (Cont.)
    137
  - Flash ROM Timing
    138
  - Flash ROM Read Cycle Timing
    138
  - Flash ROM Read Cycle
    139
  - Flash ROM Read Cycle (Cont.)
    139
  - Flash ROM Write Cycle
    140
  - Flash ROM Write Cycle
    141
  - Flash ROM Write Cycle (Cont.)
    141
  - Package Drawings
    142
  - LSI53C1030 456-Pin BGA Top View
    144
  - LSI53C1030 456-Pin BGA Top View (Cont.)
    145
  - LSI53C1030 PCI Registers
    151

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